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公开(公告)号:US10312813B2
公开(公告)日:2019-06-04
申请号:US16170452
申请日:2018-10-25
Applicant: Google LLC
Inventor: Shuai Jiang , Chee Yee Chung , Xin Li
IPC: H02M3/158
Abstract: An apparatus that includes first and second parallel converter branches, each parallel converter branch including an input node, N output nodes, a plurality of switches, a converter output node, and control logic. The control logic generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.
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公开(公告)号:US12231041B2
公开(公告)日:2025-02-18
申请号:US17600380
申请日:2020-04-03
Applicant: The Trustees of Princeton University , Google LLC
Inventor: Minjie Chen , Shuai Jiang
Abstract: According to various embodiments, a power converter circuit is disclosed. The power converter circuit includes a plurality of voltage splitting units (VSUs) coupled to a plurality of current splitting units (CSUs). The VSUs are connected to each other in series and the CSUs are connected to each other in parallel. The VSUs each have a fixed voltage conversion ratio and are operated at a lower frequency than the CSUs. The CSUs each have an adjustable voltage conversion ratio and are operated at a higher frequency than the VSUs.
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公开(公告)号:US20220057823A1
公开(公告)日:2022-02-24
申请号:US16996405
申请日:2020-08-18
Applicant: Google LLC
Inventor: Robert Ashby Armistead, III , Shuai Jiang , Binayak Roy , Thomas James Norrie , Houle Gan
IPC: G05F1/575
Abstract: A programmable thermal dissipation power (TDP) system with integrated circuits is provided. The programmable TDP system includes a software interface, a monitoring circuit, and a controller circuit. The monitoring circuit may provide for the instantaneous input power supplied to the system. The controller circuit may monitor both the target TDP information specified from upstream and the input power readings. The controller circuit may generate a pulse-width modulation (PWM) signal that corresponds to a gap between the two power levels and sends the signal to the integrated circuits on the system. The integrated circuit may respond to the change in the input PWM signal and may adjust its power consumption. For example, the integrated circuit may adjust the clock frequency, adjust the instruction rate, skip a number of clock cycles, etc.
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公开(公告)号:US20240396447A1
公开(公告)日:2024-11-28
申请号:US18200392
申请日:2023-05-22
Applicant: Google LLC
Inventor: Shuai Jiang , Chenhao Nan , Houle Gan , Qiong Wang
Abstract: The subject matter described herein provides systems and techniques for the integration of Trans-Induction Voltage regulator (TLVR) technology in a vertical power Voltage Regulator (VR) module. The capacitance inside the device to which the TLVR based vertical power VR module supplies power, rather than an output capacitance board, may be used in order to allow the module to be a single layer. In some instances, output capacitors may be integrated into components of the structures to provide adequate operational capacitance previously provided by the output capacitance board. Example structures may also include a controller.
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公开(公告)号:US20190068061A1
公开(公告)日:2019-02-28
申请号:US16170452
申请日:2018-10-25
Applicant: Google LLC
Inventor: Shuai Jiang , Chee Yee Chung , Xin Li
IPC: H02M3/158
Abstract: An apparatus that includes first and second parallel converter branches, each parallel converter branch including an input node, N output nodes, a plurality of switches, a converter output node, and control logic. The control logic generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.
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公开(公告)号:US10141849B1
公开(公告)日:2018-11-27
申请号:US15675285
申请日:2017-08-11
Applicant: Google LLC
Inventor: Shuai Jiang , Chee Yee Chung , Xin Li
IPC: H02M3/158
Abstract: An apparatus that includes first and second parallel converter branches, each parallel converter branch including an input node, N output nodes, a plurality of switches, a converter output node, and control logic. The control logic generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.
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公开(公告)号:US20240118740A1
公开(公告)日:2024-04-11
申请号:US17961155
申请日:2022-10-06
Applicant: Google LLC
Inventor: Houle Gan , Shuai Jiang , Sanjay Nilamboor , Rammohan Padmanabhan , Mohamed Elgebaly
IPC: G06F1/3296 , G06F1/329 , G06F9/48
CPC classification number: G06F1/3296 , G06F1/329 , G06F9/4893
Abstract: A method and system of tuning a voltage regulator including receiving, at a voltage regulator, workload information for a workload to be executed by a processor that receives power from the voltage regulator; setting at least one of a load line value for the voltage regulator, a setpoint voltage supplied by the voltage regulator to the processor, or a phase shedding configuration of the voltage regulator based on the workload information; and sending to the processor, after the setting is complete, an acknowledgement signal indicating that the workload can proceed.
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公开(公告)号:US20210036702A1
公开(公告)日:2021-02-04
申请号:US16921571
申请日:2020-07-06
Applicant: Google LLC
Inventor: Houle Gan , Mikhail Popovich , Shuai Jiang , Gregory Sizikov , Chee Yee Chung
IPC: H03K17/687 , G06F1/26
Abstract: An apparatus that includes an interposer, first power connectors that are disposed on a first surface and that receive respective power inputs from one or more power sources, second power connectors that are disposed on the second surface and that receive a respective third power connecter of an integrated circuit when the integrated circuit is mounted on the second surface of the interposer, a plurality of switches formed within the interposer, control circuitry formed within the interposer, and a sequencer circuit coupled to the control input of the control circuitry and that generates a different values for a control input signal that causes the control logic of the control circuitry to generate a corresponding set of switch signals, and the plurality of different values for the control input signal are generated according to a predefined sequence to provide power to the integrated circuit according to power up sequence.
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公开(公告)号:US10241783B2
公开(公告)日:2019-03-26
申请号:US15956716
申请日:2018-04-18
Applicant: Google LLC
Inventor: Tal Dayan , Safa Alai , Arda Atali , Shuai Jiang
Abstract: Disclosed are apparatus and methods for processing configuration data sets. A computing device can retrieve configuration data set(s) from data storage. A configuration data set can include key-value pairs related to configuring a software application, where a key-value pair can include a key name and an associated value. The computing device can merge the configuration data set(s) into a merged configuration data set by at least: determining whether multiple key-value pairs of the configuration data set(s) are in conflict; after determining that multiple key-value pairs of the configuration data set(s) are in conflict, determining a representative key-value pair to represent the multiple key-value pairs; and adding the representative key-value pair to the merged configuration data set. The computing device can provide the merged configuration data set to the software application.
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公开(公告)号:US09977671B2
公开(公告)日:2018-05-22
申请号:US15207100
申请日:2016-07-11
Applicant: Google LLC
Inventor: Tal Dayan , Safa Alai , Arda Atali , Shuai Jiang
CPC classification number: G06F8/71 , G06F9/44505
Abstract: Disclosed are apparatus and methods for processing configuration data sets. A computing device can retrieve configuration data set(s) from data storage. A configuration data set can include key-value pairs related to configuring a software application, where a key-value pair can include a key name and an associated value. The computing device can merge the configuration data set(s) into a merged configuration data set by at least: determining whether multiple key-value pairs of the configuration data set(s) are in conflict; after determining that multiple key-value pairs of the configuration data set(s) are in conflict, determining a representative key-value pair to represent the multiple key-value pairs; and adding the representative key-value pair to the merged configuration data set. The computing device can provide the merged configuration data set to the software application.
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