公开(公告)号：US5026666A

公开(公告)日：1991-06-25

申请号：US458114

申请日：1989-12-28

申请人： Graham W. Hills ,  Robert D. Huttemann ,  Kolawole R. Olasupo

发明人： Graham W. Hills ,  Robert D. Huttemann ,  Kolawole R. Olasupo

IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/311 ,  H01L21/336 ,  H01L21/768

CPC分类号： H01L21/76819 ,  H01L21/31116 ,  H01L21/76802 ,  Y10S438/959

摘要： An integrated circuit is made by a technique that provides a planar dielectric over gate, source, and drain regions without over-etching of the gate contact region, In the inventive process, the contact windows are etched in the conformal dielectric prior to the planarization step, so that the etch thickness is the same for the gate as for the source/drain windows. Then, a sacrificial planarizing polymer (e.g., a photoresist) is deposited to cover the conformal dielectric and fill the etched windows. Finally, a planarizing etch-back is performed, and the polymer is removed from the contact windows. A planarized dielectric is achieved without excessive etching of the gate windows.

公开(公告)号：US5268332A

公开(公告)日：1993-12-07

申请号：US975235

申请日：1992-11-12

申请人： Dayo Alugbin ,  Franklin D. Nkansah ,  Kolawole R. Olasupo

发明人： Dayo Alugbin ,  Franklin D. Nkansah ,  Kolawole R. Olasupo

IPC分类号： C23C14/00 ,  C23F1/00 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/522 ,  H01L21/465

CPC分类号： H01L21/76802

摘要： A method for forming an integrated circuit with a planarized dielectric is disclosed. Runners and gates are covered with a protective dielectric layer. Then a conventional dielectric is deposited and planarized over the entire circuit surface. When windows are opened to runners and to source/drain regions, the protective dielectric helps to slow the etch process over the runner, thus protecting the runner from damage during the extra time required for the etch process to reach the source or drain.

公开(公告)号：US5326727A

公开(公告)日：1994-07-05

申请号：US998503

申请日：1992-12-30

申请人： Taeho Kook ,  Avinoam Kornblit ,  Kolawole R. Olasupo

发明人： Taeho Kook ,  Avinoam Kornblit ,  Kolawole R. Olasupo

IPC分类号： C23F4/00 ,  G03F7/26 ,  H01L21/027 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/31

CPC分类号： H01L21/31138 ,  H01L21/32139

摘要： Pattern transfer from a resist to an underlying layer is accomplished by etching the underlying layer in a plasma comprising hydrogen bromide and oxygen. Accuracy of pattern transfer is obtained by using first and second materials underneath the resist. The first and second materials may be, e.g., polysilicon and a photoresist. Etching of the resist is performed under conditions designed to minimize changes in the horizontal dimensions.

摘要翻译： 通过在包括溴化氢和氧气的等离子体中蚀刻下面的层来实现从抗蚀剂到底层的图案转移。 通过使用抗蚀剂下面的第一和第二材料获得图案转印的精度。 第一和第二材料可以是例如多晶硅和光致抗蚀剂。 在设计用于最小化水平尺寸变化的条件下进行抗蚀剂的蚀刻。