Internal, processing-unit memory for general-purpose use
    1.
    发明授权
    Internal, processing-unit memory for general-purpose use 有权
    用于通用目的的内部处理单元存储器

    公开(公告)号:US08803897B2

    公开(公告)日:2014-08-12

    申请号:US12616636

    申请日:2009-11-11

    IPC分类号: G06F13/00

    CPC分类号: G06F9/3879 G06F9/544

    摘要: Disclosed herein is a graphics-processing unit (GPU) having an internal memory for general-purpose use and applications thereof. Such a GPU includes a first internal memory, an execution unit coupled to the first internal memory, and an interface configured to couple the first internal memory to a second internal memory of an other processing unit. The first internal memory may comprise a stacked dynamic random access memory (DRAM) or an embedded DRAM. The interface may be further configured to couple the first internal memory to a display device. The GPU may also include another interface configured to couple the first internal memory to a central processing unit. In addition, the GPU may be embodied in software and/or included in a computing system.

    摘要翻译: 这里公开了具有用于通用目的的内部存储器和其应用的图形处理单元(GPU)。 这样的GPU包括第一内部存储器,耦合到第一内部存储器的执行单元和被配置为将第一内部存储器耦合到另一个处理单元的第二内部存储器的接口。 第一内部存储器可以包括堆叠的动态随机存取存储器(DRAM)或嵌入式DRAM。 接口可以被进一步配置成将第一内部存储器耦合到显示装置。 GPU还可以包括被配置为将第一内部存储器耦合到中央处理单元的另一接口。 此外,GPU可以体现在软件中和/或包括在计算系统中。

    DEVICE PROTOCOL TRANSLATOR FOR CONNECTION OF EXTERNAL DEVICES TO A PROCESSING UNIT PACKAGE
    3.
    发明申请
    DEVICE PROTOCOL TRANSLATOR FOR CONNECTION OF EXTERNAL DEVICES TO A PROCESSING UNIT PACKAGE 审中-公开
    用于将外部设备连接到处理单元包的设备协议翻译器

    公开(公告)号:US20130073755A1

    公开(公告)日:2013-03-21

    申请号:US13237095

    申请日:2011-09-20

    IPC分类号: G06F13/42

    CPC分类号: G06F13/4221 G06F2221/2151

    摘要: A processing unit package includes a processing unit disposed on an interposer and a device protocol translator disposed on the interposer. Through-silicon vias (TSVs) may be used to provide connections from the device protocol translator through the interposer to an external device. The device protocol translator uses a controller to control a plurality of buffers that store information received from respective information buses coupled to the processing unit, such that the processing unit information is translated according to a protocol of the external device.

    摘要翻译: 处理单元包包括设置在插入器上的处理单元和设置在插入器上的设备协议翻译器。 可以使用通硅通孔(TSV)来提供从设备协议转换器通过插入器到外部设备的连接。 设备协议翻译器使用控制器来控制多个缓冲器,其存储从耦合到处理单元的相应信息总线接收的信息,使得根据外部设备的协议来翻译处理单元信息。

    Adaptive connected standby for a computing device
    4.
    发明授权
    Adaptive connected standby for a computing device 有权
    计算设备的自适应连接待机

    公开(公告)号:US09417679B2

    公开(公告)日:2016-08-16

    申请号:US13674476

    申请日:2012-11-12

    IPC分类号: G06F1/32

    摘要: Various computing devices and methods of managing the power consumption thereby are disclosed. In one aspect, a method of managing power consumption of a computing device that has a battery is provided. The method includes cycling the computing device between a connected standby active state and a connected standby idle state. The duration of the connected standby idle state is set based at least in part on a charge level of the battery.

    摘要翻译: 公开了各种计算设备和管理功耗的方法。 一方面,提供一种管理具有电池的计算装置的功耗的方法。 该方法包括在连接的待机活动状态和连接的待机空闲状态之间循环计算设备。 连接的待机空闲状态的持续时间至少部分地基于电池的充电水平来设定。

    Idle power control in multi-display systems
    6.
    发明授权
    Idle power control in multi-display systems 有权
    多显示系统中的空闲电源控制

    公开(公告)号:US08949554B2

    公开(公告)日:2015-02-03

    申请号:US13308547

    申请日:2011-12-01

    IPC分类号: G06F13/00 G06F13/28

    摘要: A system and method for reducing power consumption of a video subsystem. A computer system includes multiple display devices supported by a graphics processor. A memory for storing video data for the multiple display devices utilizes multiple channels for higher bandwidth. A systems controller within the graphics processor determines a retraining condition, such as an idle power state, is satisfied for one or more channels of the multiple memory channels. The graphics processor divides each respective screen for the multiple display devices into multiple horizontal bars. For each one of the multiple horizontal bars, the corresponding data may be rearranged from being distributed across the multiple channels to being stored in a single one of the multiple channels. The systems controller determines a given channel is an upcoming free channel. This free channel is retrained while it is free. Retraining may include at least reducing its memory clock (MCLK) frequency.

    摘要翻译: 一种用于降低视频子系统功耗的系统和方法。 计算机系统包括由图形处理器支持的多个显示设备。 用于存储用于多个显示设备的视频数据的存储器利用用于更高带宽的多个信道。 图形处理器内的系统控制器确定为多个存储器通道的一个或多个通道满足再训练状态,例如空闲功率状态。 图形处理器将用于多个显示设备的各个屏幕划分成多个水平条。 对于多个水平条中的每一个,相应的数据可以被重新布置成分布在多个通道上以存储在多个通道中的单个通道中。 系统控制器确定给定的频道是即将到来的免费频道。 这个免费频道是免费的。 再培训至少可以减少其内存时钟(MCLK)频率。

    Speculative motion prediction cache
    7.
    发明授权
    Speculative motion prediction cache 有权
    投机运动预测缓存

    公开(公告)号:US08446955B2

    公开(公告)日:2013-05-21

    申请号:US11966110

    申请日:2007-12-28

    IPC分类号: H04N7/12

    摘要: A method and apparatus to improve motion prediction in video processing systems is introduced. When a motion prediction cache completes requesting data for a current macroblock and enters an into idle state, data comprising one or more reference frames is speculatively requested, with the hope that the requested data are will be needed in a subsequent macroblock. If the speculative data is needed, then it is consumed. However, if the speculative data is not needed, then the correct data must be requested and a price is paid for an extra memory read bandwidth. In case the speculative data is the correct data for the subsequent macroblock, the effective memory read latency is reduced and the decode performance increases. The video decoder becomes more immune to memory read latency.

    摘要翻译: 介绍了一种改善视频处理系统中运动预测的方法和装置。 当运动预测缓存完成请求当前宏块的数据并进入空闲状态时,推测性地请求包括一个或多个参考帧的数据,希望在随后的宏块中需要所请求的数据。 如果需要投机数据,那么它将被消耗。 然而,如果不需要推测数据,则必须请求正确的数据,并为额外的存储器读取带宽支付价格。 在推测数据是后续宏块的正确数据的情况下,有效存储器读取等待时间减少并且解码性能增加。 视频解码器变得更加免于存储器读取延迟。

    VIDEO DECODER WITH REDUCED POWER CONSUMPTION AND METHOD THEREOF
    8.
    发明申请
    VIDEO DECODER WITH REDUCED POWER CONSUMPTION AND METHOD THEREOF 有权
    具有降低功耗的视频解码器及其方法

    公开(公告)号:US20100322318A1

    公开(公告)日:2010-12-23

    申请号:US12862579

    申请日:2010-08-24

    IPC分类号: H04N11/02

    摘要: A video decoder (10) with reduced power consumption includes a power management controller (45) that is operative to select one of a plurality of different power consumption states for a video decoder (10), and, in response to the determination, vary power consumption of at least one operational portion of the video decoder (10). In addition, in one example, a method (200) for reducing power consumption for a video decoder (10) includes determining input stream encoding description data (34) to select one of a plurality of different power consumption states for a video decoder (10) and, in response to the determination, varying power consumption of at least one operational portion of the video decoder (10).

    摘要翻译: 具有降低的功耗的视频解码器(10)包括功率管理控制器(45),其可操作以选择视频解码器(10)的多个不同功耗状态中的一个,并且响应于该确定,改变功率 消耗视频解码器(10)的至少一个操作部分。 此外,在一个示例中,用于降低视频解码器(10)的功耗的方法(200)包括确定输入流编码描述数据(34)以选择视频解码器(10)的多个不同功耗状态之一 ),并且响应于所述确定,改变所述视频解码器(10)的至少一个操作部分的功率消耗。

    System for synchronizing display of images in a multi-display computer system
    9.
    发明授权
    System for synchronizing display of images in a multi-display computer system 失效
    用于在多显示器计算机系统中同步显示图像的系统

    公开(公告)号:US07499044B2

    公开(公告)日:2009-03-03

    申请号:US10695779

    申请日:2003-10-30

    IPC分类号: G09G5/00

    摘要: An image display system synchronizes the display of images on a plurality of display devices. The system includes a first computer system generating a first signal representing first image data to be displayed on a first display device, a second computer system generating a second signal representing second image data to be displayed on a second display device, and means for synchronizing the first and second image data. The synchronizing means includes a phase-locked loop circuit having a digital rate controller. The digital rate controller allows programmable control of the speed of the phase-locked loop.

    摘要翻译: 图像显示系统使多个显示装置上的图像的显示同步。 该系统包括:第一计算机系统,生成表示要显示在第一显示装置上的第一图像数据的第一信号;第二计算机系统,生成表示要显示在第二显示装置上的第二图像数据的第二信号;以及装置, 第一和第二图像数据。 同步装置包括具有数字速率控制器的锁相环电路。 数字速率控制器允许可编程控制锁相环的速度。

    VIDEO DECODER WITH REDUCED POWER CONSUMPTION AND METHOD THEREOF
    10.
    发明申请
    VIDEO DECODER WITH REDUCED POWER CONSUMPTION AND METHOD THEREOF 有权
    具有降低功耗的视频解码器及其方法

    公开(公告)号:US20080055119A1

    公开(公告)日:2008-03-06

    申请号:US11469335

    申请日:2006-08-31

    IPC分类号: H03M7/00

    摘要: A video decoder (10) with reduced power consumption includes a power management controller (45) that is operative to select one of a plurality of different power consumption states for a video decoder (10), and, in response to the determination, vary power consumption of at least one operational portion of the video decoder (10). In addition, in one example, a method (200) for reducing power consumption for a video decoder (10) includes determining input stream encoding description data (34) to select one of a plurality of different power consumption states for a video decoder (10) and, in response to the determination, varying power consumption of at least one operational portion of the video decoder (10).

    摘要翻译: 具有降低的功耗的视频解码器(10)包括功率管理控制器(45),其可操作以选择视频解码器(10)的多个不同功耗状态中的一个,并且响应于该确定,改变功率 消耗视频解码器(10)的至少一个操作部分。 此外,在一个示例中,用于降低视频解码器(10)的功耗的方法(200)包括确定输入流编码描述数据(34)以选择视频解码器(10)的多个不同功耗状态之一 ),并且响应于所述确定,改变所述视频解码器(10)的至少一个操作部分的功率消耗。