公开(公告)号：US20050247955A1

公开(公告)日：2005-11-10

申请号：US11127991

申请日：2005-05-11

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L21/337 ,  H01L29/10 ,  H01L29/808 ,  H01L29/423

CPC分类号： H01L29/66909 ,  H01L29/1058 ,  H01L29/8083

摘要： We disclose the structure of an electronic device, the method of making the device and the operation of the device. The device is built near the top of a substrate. It has, near the top surface, a buried layer that is electrically communicable to a drain terminal. The device has a body region over the buried layer. A portion of the body region contacts a gate region connected to a gate terminal. The device has a channel region, of which the length spans the distance between the buried layer and a source region, which projects upward from the channel region and is connected to a source terminal. The device current flows in the channel substantially perpendicularly to the top surface of the substrate.

公开(公告)号：US20050194621A1

公开(公告)日：2005-09-08

申请号：US11035292

申请日：2005-01-12

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L21/337 ,  H01L29/808 ,  H01L29/80

CPC分类号： H01L29/66909 ,  H01L29/8083

摘要： We disclose the structure of a JFET device, the method of making the device and the operation of the device. The device is built near the top of a substrate. It has a buried layer that is electrically communicable to a drain terminal. It has a body region above the buried layer. A portion of the body region contacts a gate region connected to a gate terminal. The device has a channel region, of which the length spans the distance between the buried layer and a source region, which projects upward from the channel region and is connected to a source terminal. The device current flows in the channel substantially perpendicularly to the top surface of the substrate.

摘要翻译： 我们公开了JFET器件的结构，制造器件的方法和器件的操作。 该器件靠近基板顶部。 它具有可电连接到漏极端子的掩埋层。 它在埋层之上有一个体区。 身体区域的一部分接触连接到栅极端子的栅极区域。 该器件具有沟道区，其长度跨越掩埋层与源极区之间的距离，该距离从沟道区向上突出并连接到源极。 器件电流在通道中基本上垂直于衬底的顶表面流动。

公开(公告)号：US20050140030A1

公开(公告)日：2005-06-30

申请号：US11066380

申请日：2005-02-25

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L21/301 ,  H01L21/304 ,  H01L21/68 ,  H01L21/78 ,  H01L23/544 ,  H01L21/46

CPC分类号： H01L21/6836 ,  H01L21/3043 ,  H01L21/78 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method to singulate a semiconductor wafer (100) into chips, trench streets (107) of predetermined depth (105a) are formed across the first, active wafer surface (102) to define the outline of the chips (101). Thereafter, the fabrication of the active first wafer surface is completed and protected. Then, the wafer is flipped to expose the second wafer surface (103), and the wafer is subjected to a cutting saw. The saw is aligned with the trenches in the first surface so that the saw cuts the second surface along streets (106), which extend the trenches through the wafer. The saw is stopped cutting at a depth (105b), when the saw streets just coalesce with the trench streets, respectively, whereby the chips are completely singulated.

公开(公告)号：US20070246800A1

公开(公告)日：2007-10-25

申请号：US11408775

申请日：2006-04-21

申请人： Leland Swanson ,  Gregory Howard

发明人： Leland Swanson ,  Gregory Howard

IPC分类号： H01L27/12

CPC分类号： H01L29/7322 ,  H01L29/0821

摘要： A transistor apparatus includes a silicon substrate and a barrier structure extending substantially from generally adjacent the silicon substrate to a locus displaced from the silicon substrate. The barrier structure generally surrounds a volume containing connection loci for the transistor apparatus and a buried layer in a silicon medium. The connection loci and the buried layer occupy a space generally presenting a first lateral expanse generally parallel with the silicon substrate. The volume presents a second lateral expanse generally parallel with the silicon substrate. The second lateral expanse is greater than the first lateral expanse within a predetermined distance of the substrate.

摘要翻译： 晶体管装置包括硅衬底和基本上从硅衬底基本上相邻延伸到从硅衬底移位的轨迹的阻挡结构。 阻挡结构通常围绕用于晶体管装置的连接轨迹和硅介质中的掩埋层的体积。 连接轨迹和埋层占据通常呈现与硅衬底大致平行的第一横向宽度的空间。 体积呈现与硅衬底大致平行的第二横向宽度。 第二横向宽度大于在衬底的预定距离内的第一横向宽度。

公开(公告)号：US20060151804A1

公开(公告)日：2006-07-13

申请号：US11031586

申请日：2005-01-07

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L29/423

CPC分类号： H01L29/808 ,  H01L29/0692

摘要： The present invention provides a system for providing a cross-lateral junction field effect transistor (114) having desired high-performance desired voltage, frequency or current characteristics. The cross-lateral transistor is formed on a commercial semiconductor substrate (102). A channel structure (124) is formed along the substrate, having source (120) and drain (122) structures laterally formed on opposites sides thereof. A first gate structure (116) is formed along the substrate, laterally adjoining the channel structure orthogonal to the source and drain structures. A second gate structure (118) is formed along the substrate, laterally adjoining the channel structure, orthogonal to the source and drain structures and opposite the first gate structure.

摘要翻译： 本发明提供了一种用于提供具有期望的高性能期望电压，频率或电流特性的横向结型场效应晶体管（114）的系统。 横向晶体管形成在商用半导体衬底（102）上。 沿着衬底形成通道结构（124），其具有在其相对侧上横向形成的源极（120）和漏极（122）结构。 第一栅极结构（116）沿着衬底形成，横向邻接与源极和漏极结构正交的沟道结构。 第二栅极结构（118）沿着衬底形成，横向邻接沟道结构，垂直于源极和漏极结构并与第一栅极结构相对。

公开(公告)号：US20050077590A1

公开(公告)日：2005-04-14

申请号：US10681400

申请日：2003-10-08

申请人： Leland Swanson ,  Gregory Howard

发明人： Leland Swanson ,  Gregory Howard

IPC分类号： H01L21/765 ,  H01L27/08 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417 ,  H01L29/872 ,  H01L27/095 ,  H01L21/28 ,  H01L21/44 ,  H01L29/47 ,  H01L29/812 ,  H01L31/07 ,  H01L31/108

CPC分类号： H01L29/402 ,  H01L21/765 ,  H01L27/0814 ,  H01L29/417 ,  H01L29/872

摘要： A Schottky device comprises a substrate layer of a first conductivity type having a surface, a guard ring formed over the surface of the substrate layer and surrounding a barrier region of the substrate layer. The guard ring comprises a gate of a second conductivity type disposed over a dielectric layer. A metal can be formed over the barrier region to form a Schottky junction.

摘要翻译： 肖特基装置包括具有表面的第一导电类型的衬底层，形成在衬底层的表面上并围绕衬底层的阻挡区域的保护环。 保护环包括布置在电介质层上的第二导电类型的栅极。 可以在阻挡区域上形成金属以形成肖特基结。

公开(公告)号：US20060234439A1

公开(公告)日：2006-10-19

申请号：US11109231

申请日：2005-04-19

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L21/8244 ,  H01L21/8222 ,  H01L21/8234

CPC分类号： H01L27/0629 ,  H01L27/0203 ,  H01L27/0802 ,  H01L28/20

摘要： The present invention facilitates semiconductor fabrication of semiconductor devices having polysilicon resistors. An oxide layer is formed over a semiconductor device (104). A polysilicon layer is formed on the oxide layer (106). The polysilicon layer is patterned to form a polysilicon resistor (108). A poly resistor mask having a selected percentage of the poly resistor exposed is formed on the poly resistor (110). A selected dopant is implanted (112), which modifies the resistivity of the poly resistor. The mask is removed (114) and a thermal activation process is performed (116) that diffuses the implanted dopant to a substantially uniform concentration throughout the polysilicon resistor.

摘要翻译： 本发明有助于半导体制造具有多晶硅电阻器的半导体器件。 在半导体器件（104）上形成氧化物层。 在氧化物层（106）上形成多晶硅层。 图案化多晶硅层以形成多晶硅电阻（108）。 在聚电阻（110）上形成具有所述多晶硅电阻器暴露的选定百分比的多边形电阻掩模。 植入选择的掺杂剂（112），其改变聚电阻器的电阻率。 去除掩模（114）并执行热激活过程（116），其将注入的掺杂剂扩散到整个多晶硅电阻器中基本均匀的浓度。

公开(公告)号：US20050064692A1

公开(公告)日：2005-03-24

申请号：US10962048

申请日：2004-10-08

申请人： Leland Swanson ,  Gregory Howard

发明人： Leland Swanson ,  Gregory Howard

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/336 ,  H01L21/768 ,  H01L21/822 ,  H01L27/04 ,  H01L29/73 ,  H01L29/78 ,  H01L21/4763

CPC分类号： H01L21/76832 ,  H01L21/76816 ,  H01L21/76834 ,  H01L23/5223

摘要： Contacts are formed to integrated circuit devices by first forming a conductive layer (80) on a semiconductor device. An optional dielectric layer (130) is formed over the conductive layer and a carbon containing dielectric layer (140) is formed over the optional dielectric layer (130). Contacts are formed to the conductive layer (80) by etching openings in the carbon containing dielectric layer (140) and the optional dielectric layer (130).

摘要翻译： 通过首先在半导体器件上形成导电层（80），将触点形成为集成电路器件。 在所述导电层上方形成可选的介电层（130），并且在所述可选介电层（130）上形成含碳电介质层（140）。 通过蚀刻含碳介电层（140）和可选介电层（130）中的开口，将导体层（80）形成为触点。

公开(公告)号：US20070281407A1

公开(公告)日：2007-12-06

申请号：US11839855

申请日：2007-08-16

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L21/337

CPC分类号： H01L29/808 ,  H01L29/0692

摘要： The present, invention provides a system for providing a cross-lateral junction field effect transistor (114) having desired high-performance desired voltage, frequency or current characteristics. The cross-lateral transistor is formed on a commercial semiconductor substrate (102). A channel structure (124) is formed along the substrate, having source (120) and drain (122) structures laterally formed on opposites sides thereof. A first gate stricture (116) is formed along the substrate, laterally adjoining the channel structure orthogonal to the source and drain structures. A second gate structure (118) is formed along the substrate, laterally adjoining the channel structure, orthogonal to the source and drain structures and opposite the first gate structure.

摘要翻译： 本发明提供了一种用于提供具有期望的高性能期望电压，频率或电流特性的横向结型场效应晶体管（114）的系统。 横向晶体管形成在商用半导体衬底（102）上。 沿着衬底形成通道结构（124），其具有在其相对侧上横向形成的源极（120）和漏极（122）结构。 沿着衬底形成第一栅极狭窄（116），横向邻接与源极和漏极结构正交的沟道结构。 第二栅极结构（118）沿着衬底形成，横向邻接沟道结构，垂直于源极和漏极结构并与第一栅极结构相对。

公开(公告)号：US20060046356A1

公开(公告)日：2006-03-02

申请号：US10931104

申请日：2004-08-31

申请人： Gregory Howard ,  Leland Swanson

发明人： Gregory Howard ,  Leland Swanson

IPC分类号： H01L21/84 ,  H01L21/302

CPC分类号： H01L21/6835 ,  H01L23/3171 ,  H01L2221/6835 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a method of manufacturing a semiconductor device is provided. The method comprises forming a silicon-on-insulator (SOI) wafer. The SOI wafer has a carrier silicon layer, an oxide layer disposed outwardly from the carrier silicon layer, and a silicon layer disposed outwardly from the oxide layer. The method also includes forming at least one feature at least partially in the silicon layer. The method also includes separating the carrier silicon layer from the silicon layer by chemically removing the oxide layer.

摘要翻译： 根据一个实施例，提供一种制造半导体器件的方法。 该方法包括形成绝缘体上硅（SOI）晶片。 SOI晶片具有载体硅层，从载体硅层向外设置的氧化物层和从氧化物层向外设置的硅层。 该方法还包括至少部分地在硅层中形成至少一个特征。 该方法还包括通过化学去除氧化物层从硅层分离载体硅层。