公开(公告)号：US6086678A

公开(公告)日：2000-07-11

申请号：US262417

申请日：1999-03-04

申请人： Gregory M. Wilson ,  Michael J. Ries ,  Thomas A. Torack

发明人： Gregory M. Wilson ,  Michael J. Ries ,  Thomas A. Torack

IPC分类号： H01L21/00 ,  H01L21/677 ,  C23C16/00

CPC分类号： H01L21/67748 ,  H01L21/67017

摘要： A system for equalizing pressure across a gate adapted to selectively block a port connecting a wafer handling chamber to a process chamber of a reactor for depositing an epitaxial layer on a semiconductor wafer positioned in the process chamber. The system comprises a bypass passage connecting the process chamber to the wafer handling chamber for transporting gas between the process chamber and the wafer handling chamber when the gate is blocking the port connecting the wafer handling chamber to the process chamber of the reactor for equalizing pressure between the process chamber and the wafer handling chamber. The system also includes a bypass valve positioned along the bypass passage for selectively controlling gas flow through the bypass passage. The bypass valve has an open position in which gas is permitted to flow through the bypass passage to equalize pressure between the process chamber and the wafer handling chamber and a closed position in which gas is prevented from flowing through the bypass passage to isolate the process chamber from the wafer handling chamber. In addition, the system includes a flow restrictor positioned along the bypass passage for restricting gas flow through the bypass passage to limit pressure change rates in the process chamber and the wafer handling chamber when the bypass valve is in the open position and thereby to limit a maximum velocity of gas flowing through the bypass passage.

摘要翻译： 一种用于均衡跨过闸门的压力的系统，其适于选择性地阻挡将晶片处理室连接到反应器的处理室的端口，用于在位于处理室中的半导体晶片上沉积外延层。 该系统包括将处理室连接到晶片处理室的旁通通道，用于在处理室和晶片处理室之间输送气体，当栅极阻塞将晶片处理室连接到反应器的处理室的端口时， 处理室和晶片处理室。 该系统还包括沿旁路通道定位的旁通阀，用于选择性地控制通过旁路通道的气流。 旁通阀具有打开位置，在该位置允许气体流过旁路通道以均衡处理室和晶片处理室之间的压力，并且阻止气体流过旁路通道以隔离处理室的关闭位置 从晶片处理室。 此外，该系统包括沿着旁路通道定位的限流器，用于限制通过旁路通道的气流，以限制旁通阀处于打开位置时处理室和晶片处理室中的压力变化率，从而限制 流过旁路通道的气体的最大速度。

公开(公告)号：US20100130021A1

公开(公告)日：2010-05-27

申请号：US12623863

申请日：2009-11-23

申请人： Michael J. Ries ,  Robert W. Standley ,  Jeffrey L. Libbert ,  Andrew M. Jones ,  Gregory M. Wilson

发明人： Michael J. Ries ,  Robert W. Standley ,  Jeffrey L. Libbert ,  Andrew M. Jones ,  Gregory M. Wilson

IPC分类号： H01L21/306

CPC分类号： H01L21/76254 ,  H01L21/02032 ,  H01L21/30604 ,  H01L21/324 ,  H01L21/3247

摘要： A method is disclosed for processing the cleaved surface of a silicon-on-insulator structure. The silicon-on-insulator structures comprises a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer. The silicon layer has a cleaved surface defining an outer surface of the structure. The methods disclosed include an etching process to reduce the time and cost required to process the silicon-on-insulator structure to remove the surface damage and defects formed when a portion of the donor wafer is separated along a cleave plane from the silicon-on-insulator structure. The method includes, annealing the structure, etching the cleaved surface, and performing a non-contact smoothing process on the cleaved surface.

摘要翻译： 公开了一种用于处理绝缘体上硅结构的切割表面的方法。 绝缘体上的结构包括处理晶片，硅层和处理晶片和硅层之间的介电层。 硅层具有限定结构的外表面的切割表面。 所公开的方法包括蚀刻工艺，以减少加工绝缘体上硅结构以消除表面损伤所需的时间和成本，并且当施主晶片的一部分沿着解离平面从硅 - 绝缘体结构。 该方法包括：退火结构，蚀刻裂开的表面，以及在切割的表面上进行非接触平滑处理。

公开(公告)号：US06497403B2

公开(公告)日：2002-12-24

申请号：US09751897

申请日：2000-12-28

申请人： Michael J. Ries

发明人： Michael J. Ries

IPC分类号： B25B124

CPC分类号： H01L21/68742 ,  H01L21/6875

摘要： A holder for holding a semiconductor wafer for treatment in wafer treating apparatus including a plurality of supports for generally point support of the wafer at a plurality of points on the wafer. Each support bears a fraction of weight of the wafer and is movable up and down and subject to force biasing it to move upward. The total of the forces exerted on the supports biasing them upward is adapted to counterbalance the weight of the wafer.

摘要翻译： 一种保持用于在晶片处理装置中保持用于处理的半导体晶片的保持器，该晶片处理装置包括多个支撑件，用于在晶片上的多个点处大体上支撑晶片。 每个支撑件承载晶片重量的一小部分，并可上下移动，并承受力作用力以向上移动。 施加在支撑件上的向上偏压的力的总和适于平衡晶片的重量。

公开(公告)号：US06596095B2

公开(公告)日：2003-07-22

申请号：US09752222

申请日：2000-12-29

申请人： Michael J. Ries ,  Charles Chiun-Chieh Yang ,  Robert W. Standley

发明人： Michael J. Ries ,  Charles Chiun-Chieh Yang ,  Robert W. Standley

IPC分类号： C30B2906

CPC分类号： C30B29/06 ,  C23C16/0227 ,  C23C16/4584 ,  C30B25/12 ,  Y10S117/90 ,  Y10T117/10

摘要： A single crystal silicon wafer with a back surface free of an oxide seal and substantially free of a chemical vapor deposition process induced halo and an epitaxial silicon layer on the front surface, the epitaxial layer is characterized by an axially symmetric region extending radially outwardly from the central axis of the wafer toward the circumferential edge of the wafer having a substantially uniform resistivity, the radius of the axially symmetric region being at least about 80% of the length of the radius of the wafer.

摘要翻译： 具有背面没有氧化物密封并且基本上没有化学气相沉积工艺的单晶硅晶片在前表面上引起卤素和外延硅层，外延层的特征在于轴向对称区域从 晶片的中心轴朝向晶片的圆周边缘具有基本均匀的电阻率，轴向对称区域的半径为晶片半径长度的至少约80％。

公开(公告)号：US5792273A

公开(公告)日：1998-08-11

申请号：US863960

申请日：1997-05-27

申请人： Michael J. Ries ,  Lance G. Hellwig ,  Jon A. Rossi

发明人： Michael J. Ries ,  Lance G. Hellwig ,  Jon A. Rossi

IPC分类号： C23C16/48 ,  C30B25/10 ,  H01L21/205 ,  C23C16/00

CPC分类号： C30B25/105 ,  C23C16/481

摘要： A horizontal reactor for depositing an epitaxial layer on a semiconductor wafer. The reactor includes a reaction chamber sized and shaped for receiving the semiconductor wafer and a susceptor having an outer edge and a generally planar wafer receiving surface positioned in the reaction chamber for supporting the semiconductor wafer. In addition, the reactor includes a heating array positioned outside the reaction chamber including a plurality of heat lamps and a primary reflector for directing thermal radiation emitted by the heat lamps toward the susceptor to heat the semiconductor wafer and susceptor. Further, the reactor includes a secondary edge reflector having a specular surface positioned beside the heating array for recovering misdirected thermal radiation directed generally to a side of the heating array and away from the susceptor. The secondary edge reflector is shaped and arranged with respect to the heating array and the susceptor for re-directing the misdirected thermal radiation to the outer edge of the susceptor. Thus, the secondary edge reflector heats the edge and reduces thermal gradients across the susceptor and the semiconductor wafer to inhibit slip dislocations in the wafer during epitaxial layer deposition.

摘要翻译： 一种用于在半导体晶片上沉积外延层的水平反应器。 反应器包括尺寸和形状适于接收半导体晶片的反应室和具有位于反应室中用于支撑半导体晶片的外边缘和大致平面的晶片接收表面的基座。 此外，反应器包括位于反应室外部的加热阵列，其包括多个加热灯和用于将由热灯发射的热辐射朝向基座引导以加热半导体晶片和基座的主反射器。 此外，反应器包括次级边缘反射器，其具有位于加热阵列旁边的镜面，用于回收通常指向加热阵列的一侧并远离基座的误导热辐射。 第二边缘反射器相对于加热阵列和基座被成形和布置，用于将错误定向的热辐射重新引导到基座的外边缘。 因此，次边缘反射器加热边缘并降低基座和半导体晶片两端的热梯度，以抑制外延层沉积期间晶片中的滑移位错。

公开(公告)号：US08859393B2

公开(公告)日：2014-10-14

申请号：US13162122

申请日：2011-06-16

申请人： Michael J. Ries ,  Dale A. Witte ,  Anca Stefanescu ,  Andrew M. Jones

发明人： Michael J. Ries ,  Dale A. Witte ,  Anca Stefanescu ,  Andrew M. Jones

IPC分类号： H01L21/30 ,  H01L21/46 ,  H01L21/762

CPC分类号： H01L21/76254

摘要： Methods and systems are disclosed for performing a passivation process on a silicon-on-insulator wafer in a chamber in which the wafer is cleaved. A bonded wafer pair is cleaved within the chamber to form the silicon-on-insulator (SOI) wafer. A cleaved surface of the SOI wafer is then passivated in-situ by exposing the cleaved surface to a passivating substance. This exposure to a passivating substance results in the formation of a thin layer of oxide on the cleaved surface. The silicon-on-insulator wafer is then removed from the chamber. In other embodiments, the silicon-on-insulator wafer is first transferred to an adjoining chamber where the wafer is then passivated. The wafer is transferred to the adjoining chamber without exposing the wafer to the atmosphere outside the chambers.

摘要翻译： 公开了用于在其中晶片被切割的腔室中的绝缘体上硅晶片上进行钝化处理的方法和系统。 键合晶片对在腔室内切割以形成绝缘体上硅（SOI）晶片。 然后通过将切割的表面暴露于钝化物质来原位钝化SOI晶片的切割表面。 这种暴露于钝化物质导致在切割表面上形成薄层的氧化物。 然后将绝缘体硅晶片从腔室中取出。 在其他实施例中，绝缘体上硅晶片首先被转移到相邻的腔室，然后晶片被钝化。 将晶片转移到相邻的室，而不将晶片暴露于室外的大气。

公开(公告)号：US20120003814A1

公开(公告)日：2012-01-05

申请号：US13162122

申请日：2011-06-16

申请人： Michael J. Ries ,  Dale A. Witte ,  Anca Stefanescu ,  Andrew M. Jones

发明人： Michael J. Ries ,  Dale A. Witte ,  Anca Stefanescu ,  Andrew M. Jones

IPC分类号： H01L21/301 ,  H01L21/31

CPC分类号： H01L21/76254

摘要： Methods and systems are disclosed for performing a passivation process on a silicon-on-insulator wafer in a chamber in which the wafer is cleaved. A bonded wafer pair is cleaved within the chamber to form the silicon-on-insulator (SOI) wafer. A cleaved surface of the SOI wafer is then passivated in-situ by exposing the cleaved surface to a passivating substance. This exposure to a passivating substance results in the formation of a thin layer of oxide on the cleaved surface. The silicon-on-insulator wafer is then removed from the chamber. In other embodiments, the silicon-on-insulator wafer is first transferred to an adjoining chamber where the wafer is then passivated. The wafer is transferred to the adjoining chamber without exposing the wafer to the atmosphere outside the chambers.

摘要翻译： 公开了用于在其中晶片被切割的腔室中的绝缘体上硅晶片上进行钝化处理的方法和系统。 键合晶片对在腔室内切割以形成绝缘体上硅（SOI）晶片。 然后通过将切割的表面暴露于钝化物质来原位钝化SOI晶片的切割表面。 这种暴露于钝化物质导致在切割表面上形成薄层的氧化物。 然后将绝缘体硅晶片从腔室中取出。 在其他实施例中，绝缘体上硅晶片首先被转移到相邻的腔室，然后晶片被钝化。 将晶片转移到相邻的室，而不将晶片暴露于室外的大气。