Silicon wafers having controlled distribution of defects, and methods of preparing the same
    2.
    发明授权
    Silicon wafers having controlled distribution of defects, and methods of preparing the same 有权
    具有受控的缺陷分布的硅晶片及其制备方法

    公开(公告)号:US06485807B1

    公开(公告)日:2002-11-26

    申请号:US09702503

    申请日:2000-10-31

    申请人: Jea-gun Park

    发明人: Jea-gun Park

    IPC分类号: C30B2906

    摘要: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere containing nitrogen (N2) and argon (Ar) or N2 and hydrogen (H2), in a donor killing step during a wafering process.

    摘要翻译: 提供了具有受控的缺陷分布的硅晶片,其中具有从晶片表面向内的足够深度的裸露区域在晶片的主体区域中与高吸杂效应组合。 在硅晶片中,作为固有吸气部位的氧析出物显示垂直分布。 从晶片的顶表面到底表面的氧沉淀浓度分布包括在晶片的顶表面和底表面的第一和第二预定深度处的第一和第二峰,在晶片的顶表面和底表面之间的裸露区域 第一和第二峰,以及在第一和第二峰之间的对应于晶片的体区的凹区。 对于这种氧沉淀物浓度分布,在晶片化过程中,在供体杀死步骤中,将晶片暴露于含氮(N 2)和氩(Ar)或N 2和氢(H 2)的气体混合气体中的快速热退火工艺 。

    Silicon wafer
    4.
    发明授权
    Silicon wafer 有权
    硅晶片

    公开(公告)号:US06599603B1

    公开(公告)日:2003-07-29

    申请号:US09673955

    申请日:2000-10-24

    IPC分类号: C30B2906

    摘要: The present invention provides a CZ silicon wafer, wherein the wafer includes rod-like void defects and/or plate-like void defects inside thereof, and a CZ silicon wafer, wherein the silicon wafer includes void defects inside the wafer, a maximum value of a ratio between long side length L1 and short side length L2 (L1/L2) in an optional rectangle circumscribed the void defect image projected on an optional {110} plane is 2.5 or more, and the silicon wafer including rod-like void defects and/or plate-like void defects inside the wafer, wherein a void defect density of the silicon wafer at a depth of from the wafer surface to at least 0.5 &mgr;m after the heat treatment is ½ or less than that of inside the wafer. According to this, the silicon wafer, which is suitable for expanding reducing effect of void defects by heat treatment up to a deeper region, can be obtained.

    摘要翻译: 本发明提供了一种CZ硅晶片,其中晶片在其内部包括棒状空隙缺陷和/或板状空隙缺陷,以及CZ硅晶片,其中硅晶片包括晶片内的空隙,其最大值 在可选择的{110}平面上投影的空隙缺陷图像的任意矩形中的长边长L1和短边长L2之间的比率(L1 / L2)为2.5以上,硅晶片包括棒状空隙, /或晶片内的板状空隙缺陷,其中在晶片表面的深度处的硅晶片的空隙缺陷密度在热处理之后至少为0.5微米的半孔缺陷密度为晶片内部的1/2以下。 据此,可以获得适合于通过热处理直到更深的区域来减少空隙缺陷的效果的硅晶片。

    Method for revealing agglomerated intrinsic point defects in semiconductor crystals
    6.
    发明授权
    Method for revealing agglomerated intrinsic point defects in semiconductor crystals 失效
    揭示半导体晶体凝聚固有点缺陷的方法

    公开(公告)号:US06638357B2

    公开(公告)日:2003-10-28

    申请号:US09475320

    申请日:1999-12-30

    IPC分类号: C30B2906

    摘要: A method for revealing agglomerated intrinsic point defect. The method comprising coating a sample with a metal capable of decorating agglomerated intrinsic point defects, heat-treating the coated sample to decorate any agglomerated intrinsic point defects, cooling the sample, etching the surface of the cooled sample without delineating the decorated agglomerated intrinsic point defects and etching the etched surface with a delineating etchant to reveal the decorated intrinsic point defects.

    摘要翻译: 一种揭示团聚内在缺陷的方法。 该方法包括用能够装饰聚集的本征点缺陷的金属涂覆样品,热处理涂覆的样品以装饰任何凝聚的本征点缺陷,冷却样品,蚀刻冷却的样品的表面,而不描绘装饰的附聚固有点缺陷 并用描绘的蚀刻剂蚀刻蚀刻的表面以揭示装饰的固有点缺陷。

    single crystalline silicon wafer, ingot, and producing method thereof
    8.
    发明授权
    single crystalline silicon wafer, ingot, and producing method thereof 有权
    单晶硅晶片,锭及其制造方法

    公开(公告)号:US06521316B2

    公开(公告)日:2003-02-18

    申请号:US09742215

    申请日:2000-12-22

    IPC分类号: C30B2906

    摘要: The present invention relates to a single crystalline silicon ingot, a single crystalline wafer, and a producing method thereof in accordance with the Czochralski method which enables reduction of a large defect area while increasing a micro-vacancy defect area in an agglomerated vacancy point area, which is the area between a central axis and an oxidation-induced stacking fault ring, by providing uniform conditions of crystal ingot growth and cooling and by adjusting a pulling rate for growing an ingot to grow, thus the oxidation-induced stacking fault ring exists only at an edge of the ingot radius.

    摘要翻译: 本发明涉及一种单晶硅锭,单晶晶片及其制造方法,该方法能够减少大的缺陷面积,同时增加聚集的空位点区域的微空缺缺陷面积, 这是通过提供晶锭生长和冷却的均匀条件以及通过调整生长锭生长的牵引速率来产生中心轴和氧化诱发的堆垛层错环之间的区域,因此氧化诱导堆垛层错环只存在 在晶锭半径的边缘。

    Thermally annealed, low defect density single crystal silicon
    9.
    发明授权
    Thermally annealed, low defect density single crystal silicon 有权
    热退火,低缺陷密度单晶硅

    公开(公告)号:US06416836B1

    公开(公告)日:2002-07-09

    申请号:US09416998

    申请日:1999-10-13

    IPC分类号: C30B2906

    摘要: A single crystal silicon wafer having a central axis, a front side and a back side which are generally perpendicular to the central axis, a central plane between the front and back sides, a circumferential edge, and a radius extending from the central axis to the circumferential edge. The wafer comprises first and second axially symmetric regions. The first axially symmetric region extends radially inwardly from the circumferential edge, contains silicon self-interstitials as the predominant intrinsic point defect, and is substantially free of agglomerated interstitial defects. The second axially symmetric region has vacancies as the predominant intrinsic point defect, comprises a surface layer extending from the front side toward the central plane and a bulk layer extending from the surface layer to the central plane, wherein the number density of agglomerated vacancy defects present in the surface layer is less than the concentration in the bulk layer.

    摘要翻译: 具有大致垂直于中心轴的中心轴,前侧和后侧的单晶硅晶片,前侧和后侧之间的中心平面,周向边缘和从中心轴线延伸到半圆形半径 圆周边缘。 晶片包括第一和第二轴对称区域。 第一轴对称区域从圆周边缘径向向内延伸,包含硅自填隙作为主要固有点缺陷,并且基本上没有聚集的间隙缺陷。 第二轴向对称区域具有作为主要固有点缺陷的空位,包括从前侧向中心平面延伸的表面层和从表面层延伸到中心平面的本体层,其中存在凝聚空位缺陷的数量密度 在表面层中的小于集体层中的浓度。

    Production method for silicon wafer and silicon wafer
    10.
    发明授权
    Production method for silicon wafer and silicon wafer 有权
    硅晶片和硅晶片的生产方法

    公开(公告)号:US06544656B1

    公开(公告)日:2003-04-08

    申请号:US09674841

    申请日:2000-11-07

    IPC分类号: C30B2906

    摘要: A silicon wafer is produced by growing a silicon single crystal ingot having a resistivity of 100 &OHgr;·cm or more and an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to an oxygen precipitation heat treatment so that a residual interstitial oxygen concentration in the wafer should become 8 ppma or less. A silicon wafer produced as described above shows little decrease in resistivity even after a heat treatment in device production etc. Further, if a silicon wafer is produced and heat-treated so that the wafer should have the above-defined initial interstitial oxygen concentration and residual interstitial oxygen concentration, slip dislocations in a subsequent heat treatment process are prevented irrespective of resistivity. Furthermore, by forming an epitaxial layer on a surface of a silicon wafer of the present invention, a high resistivity epitaxial wafer can be produced, which is free from slip dislocations etc. and can be used for various devices.

    摘要翻译: 通过使用Czochralski法生长电阻率为100欧姆·厘米或更高的初始间隙氧浓度为10〜25ppma的硅单晶锭,将硅单晶锭加工成晶片,生产硅晶片, 晶片进行氧析出热处理,使得晶片中的残留间隙氧浓度应变为8ppma以下。 如上所述制造的硅晶片即使在器件制造等中进行热处理之后也几乎没有电阻降低。此外,如果制造硅晶片并进行热处理,使得晶片应具有上述初始间隙氧浓度和残留量 间隙氧浓度,随后的热处理过程中的滑移位错被阻止,而与电阻率无关。 此外,通过在本发明的硅晶片的表面上形成外延层,可以制造不含滑移位错等的高电阻率外延晶片,并可用于各种器件。