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公开(公告)号：US08868015B2
公开(公告)日：2014-10-21
申请号：US12782848
申请日：2010-05-19
申请人： Gregory Uehara , Chao Yang , Ruoxin Jiang , Fernando De Bernardinis , Alessandro Venca , Rinaldo Castello , Marc Leroux , Brian Brunn
发明人： Gregory Uehara , Chao Yang , Ruoxin Jiang , Fernando De Bernardinis , Alessandro Venca , Rinaldo Castello , Marc Leroux , Brian Brunn
CPC分类号： H04B1/0071
摘要： In one embodiment, an apparatus includes an upconversion unit configured to upconvert a baseband signal to a radio frequency (RF) signal. A plurality of baluns for a plurality of wireless bands are provided. Multiplexing circuitry is coupled to the plurality of baluns where the upconversion unit is coupled to each balun through the multiplexing circuitry. The multiplexing circuitry is configured to multiplex the radio frequency signal from the upconversion unit to one of the plurality of baluns based on a wireless band being used.
摘要翻译： 在一个实施例中，一种装置包括上变频单元，其被配置为将基带信号上变频到射频（RF）信号。 提供了多个用于多个无线频段的不平衡变压器。 多路复用电路耦合到多个不平衡转换器，其中上转换单元通过复用电路耦合到每个平衡 - 不平衡变换器。 复用电路被配置为基于所使用的无线频带将来自上变频单元的射频信号复用到多个巴伦中的一个。
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公开(公告)号：US20100295599A1
公开(公告)日：2010-11-25
申请号：US12782848
申请日：2010-05-19
申请人： Gregory Uehara , Chao Yang , Ruoxin Jiang , Fernando De Bernardinis , Alessandro Venca , Rinaldo Castello , Marc Leroux , Brian Brunn
发明人： Gregory Uehara , Chao Yang , Ruoxin Jiang , Fernando De Bernardinis , Alessandro Venca , Rinaldo Castello , Marc Leroux , Brian Brunn
CPC分类号： H04B1/0071
摘要： In one embodiment, an apparatus includes an upconversion unit configured to upconvert a baseband signal to a radio frequency (RF) signal. A plurality of baluns for a plurality of wireless bands are provided. Multiplexing circuitry is coupled to the plurality of baluns where the upconversion unit is coupled to each balun through the multiplexing circuitry. The multiplexing circuitry is configured to multiplex the radio frequency signal from the upconversion unit to one of the plurality of baluns based on a wireless band being used.
摘要翻译： 在一个实施例中，一种装置包括上变频单元，其被配置为将基带信号上变频到射频（RF）信号。 提供了多个用于多个无线频段的不平衡变压器。 多路复用电路耦合到多个不平衡转换器，其中上转换单元通过复用电路耦合到每个平衡 - 不平衡变换器。 复用电路被配置为基于所使用的无线频带将来自上变频单元的射频信号复用到多个巴伦中的一个。
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公开(公告)号：US08520771B1
公开(公告)日：2013-08-27
申请号：US12767922
申请日：2010-04-27
申请人： Brian Brunn , Marc Leroux , Gregory Uehara
发明人： Brian Brunn , Marc Leroux , Gregory Uehara
IPC分类号： H04L25/49
CPC分类号： H04B1/0475 , H04L25/03859 , H04L27/362 , H04L27/368
摘要： This disclosure describes techniques for modulating data. In one embodiment, these techniques include receiving an I or Q value, generating a time-shifted sample of a shaped pulse based on the I or Q value, and providing the time-shifted sample to a digital-to-analog converter.
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公开(公告)号：US08400197B2
公开(公告)日：2013-03-19
申请号：US13191329
申请日：2011-07-26
申请人： Luca Romano , Alessandro Venca , Stefano Dal Toso , Antonio Milani , Brian Brunn
发明人： Luca Romano , Alessandro Venca , Stefano Dal Toso , Antonio Milani , Brian Brunn
IPC分类号： H03L7/06
CPC分类号： H03L7/08 , H03L7/07 , H03L7/0805 , H03L7/0816 , H03L7/16 , H03L7/1976
摘要： In one embodiment, an apparatus includes a jitter generator configured to receive a reference clock; add jitter to the reference clock; and output the reference clock with the included jitter to a phase lock loop (PLL). The PLL is used to generate a local oscillator (LO) signal for a transceiver. A jitter controller outputs a signal to the jitter generator to control a characteristic of the jitter added to the reference clock. The reference clock with the added jitter is used to reduce a fractional spur caused by a radio frequency (RF) attacker coupling into the PLL.
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公开(公告)号：US20120025880A1
公开(公告)日：2012-02-02
申请号：US13191329
申请日：2011-07-26
申请人： Luca Romano , Alessandro Venca , Stefano Dal Toso , Antonio Milani , Brian Brunn
发明人： Luca Romano , Alessandro Venca , Stefano Dal Toso , Antonio Milani , Brian Brunn
IPC分类号： H03L7/08
CPC分类号： H03L7/08 , H03L7/07 , H03L7/0805 , H03L7/0816 , H03L7/16 , H03L7/1976
摘要： In one embodiment, an apparatus includes a jitter generator configured to receive a reference clock; add jitter to the reference clock; and output the reference clock with the included jitter to a phase lock loop (PLL). The PLL is used to generate a local oscillator (LO) signal for a transceiver. A jitter controller outputs a signal to the jitter generator to control a characteristic of the jitter added to the reference clock. The reference clock with the added jitter is used to reduce a fractional spur caused by a radio frequency (RF) attacker coupling into the PLL.
摘要翻译： 在一个实施例中，一种装置包括被配置为接收参考时钟的抖动发生器; 将抖动添加到参考时钟; 并将包含抖动的参考时钟输出到锁相环（PLL）。 PLL用于为收发器产生本地振荡器（LO）信号。 抖动控制器向抖动发生器输出信号，以控制添加到参考时钟的抖动特性。 具有增加的抖动的参考时钟用于减少由耦合到PLL的射频（RF）攻击者引起的分数杂散。
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公开(公告)号：US08681893B1
公开(公告)日：2014-03-25
申请号：US12574879
申请日：2009-10-07
申请人： Brian Brunn , Marc Leroux
发明人： Brian Brunn , Marc Leroux
IPC分类号： H04L27/00
CPC分类号： H04L27/2071 , H04L25/03859
摘要： This disclosure describes techniques for using a pulse look-up-table to replace FIR filters used to implement modulation schemes, such as the modulation schemes used by various wireless communication technologies. In some embodiments the pulse look-up-table is segmented and minimized so that the pulse look-up-table can be used with complex modulation schemes.
摘要翻译： 本公开描述了使用脉冲查找表来替代用于实现调制方案的FIR滤波器的技术，诸如由各种无线通信技术使用的调制方案。 在一些实施例中，脉冲查找表被分段和最小化，使得脉冲查找表可以与复杂调制方案一起使用。
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7.发明授权Frequency and Q-factor tunable filters using frequency translatable impedance structures 有权频率和Q因子可调滤波器使用频率可调阻抗结构公开(公告)号：US08565349B2
公开(公告)日：2013-10-22
申请号：US13412753
申请日：2012-03-06
申请人： Brian Brunn , Gregory Uehara , Sehat Sutardja
发明人： Brian Brunn , Gregory Uehara , Sehat Sutardja
IPC分类号： H04L27/00
CPC分类号： H04B1/109 , H04B1/1036
摘要： A system includes an input node, a frequency translatable impedance (FTI) filter, and a radio frequency (RF) downconverter module. The input receives an input signal having first and second components. The FTI filter filters the second components. The RF downconverter module receives the first components and downconverts the first components. Both the FTI filter and the RF downconverter module communicate with the input node.
摘要翻译： 系统包括输入节点，频率可转换阻抗（FTI）滤波器和射频（RF）下变频器模块）。 输入接收具有第一和第二分量的输入信号。 FTI过滤器过滤第二个组件。 RF下变频器模块接收第一组件并对第一组件进行下变频。 FTI滤波器和RF下变频器模块都与输入节点通信。
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公开(公告)号：US08346179B2
公开(公告)日：2013-01-01
申请号：US12772654
申请日：2010-05-03
申请人： Brian Brunn , Sehat Sutardja , Xiaohua Fan , Gregory Uehara
发明人： Brian Brunn , Sehat Sutardja , Xiaohua Fan , Gregory Uehara
IPC分类号： H04B1/38
CPC分类号： H03F3/3001 , H03F3/45188
摘要： An amplifier integrated circuit (IC) includes a push-pull configuration including a push stage and a pull stage. A first loop of wire is configured to form a first degeneration inductance of the push stage. A second loop of wire is configured to form a first degeneration inductance of the pull stage. The first and second loops are concentric.
摘要翻译： 放大器集成电路（IC）包括包括推进级和拉动级的推挽配置。 导线的第一回路被配置成形成推进级的第一退化电感。 电线的第二回路被配置成形成拉阶段的第一退化电感。 第一和第二环是同心的。
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9.发明申请Frequency and Q-Factor Tunable Filters Using Frequency Translatable Impedance Structures 有权频率和Q因子可调滤波器使用频率可逆阻抗结构公开(公告)号：US20120170617A1
公开(公告)日：2012-07-05
申请号：US13412753
申请日：2012-03-06
申请人： Brian Brunn , Gregory Uehara , Sehat Sutardja
发明人： Brian Brunn , Gregory Uehara , Sehat Sutardja
IPC分类号： H04B1/707
CPC分类号： H04B1/109 , H04B1/1036
摘要： A system includes an input node, a frequency translatable impedance (FTI) filter, and a radio frequency (RF) downconverter module. The input receives an input signal having first and second components. The FTI filter filters the second components. The RF downconverter module receives the first components and downconverts the first components. Both the FTI filter and the RF downconverter module communicate with the input node.
摘要翻译： 系统包括输入节点，频率可转换阻抗（FTI）滤波器和射频（RF）下变频器模块）。 输入接收具有第一和第二分量的输入信号。 FTI过滤器过滤第二个组件。 RF下变频器模块接收第一组件并对第一组件进行下变频。 FTI滤波器和RF下变频器模块都与输入节点通信。
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10.发明授权Frequency and Q-factor tunable filters using frequency translatable impedance structures 有权频率和Q因子可调滤波器使用频率可调阻抗结构公开(公告)号：US08130872B2
公开(公告)日：2012-03-06
申请号：US12018933
申请日：2008-01-24
申请人： Brian Brunn , Gregory Uehara , Sehat Sutardja
发明人： Brian Brunn , Gregory Uehara , Sehat Sutardja
IPC分类号： H04B1/10
CPC分类号： H04B1/109 , H04B1/1036
摘要： A system includes an input node, a frequency translatable impedance (FTI) filter, and a radio frequency (RF) downconverter module. The input receives an input signal having first and second components. The FTI filter filters the second components. The RF downconverter module receives the first components and downconverts the first components. Both the FTI filter and the RF downconverter module communicate with the input node.
摘要翻译： 系统包括输入节点，频率可转换阻抗（FTI）滤波器和射频（RF）下变频器模块）。 输入接收具有第一和第二分量的输入信号。 FTI过滤器过滤第二个组件。 RF下变频器模块接收第一组件并对第一组件进行下变频。 FTI滤波器和RF下变频器模块都与输入节点通信。
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