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公开(公告)号：US20090302322A1
公开(公告)日：2009-12-10
申请号：US12492991
申请日：2009-06-26
IPC分类号： H01L29/786 , H01L21/20
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
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公开(公告)号：US07566907B2
公开(公告)日：2009-07-28
申请号：US12135761
申请日：2008-06-09
IPC分类号： H01L21/00
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
摘要翻译： 相对于衬底形成薄膜晶体管的方法包括：a）在衬底上提供多晶材料的薄膜晶体管层，所述多晶材料包括晶界; b）在多晶薄膜层附近提供含氟层; c）在一段温度和一段时间内退火含氟层，所述时间段有效地将氟从含氟层驱动到多晶薄膜层中，并且在晶界内引入氟以钝化所述晶界; 以及d）提供与所述薄膜晶体管层可操作地相邻的晶体管栅极。 薄膜晶体管可以被制造为底部门控或顶部门控。 可以在薄膜晶体管层和含氟层之间设置缓冲层，缓冲层在退火期间从含氟层透过氟。 优选地，退火温度足够高以将氟从含氟层驱动到多晶薄膜层中并且在晶界内引入氟以使所述晶界钝化，但是足够低以防止含氟层与 多晶薄膜层。
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公开(公告)号：US06890842B2
公开(公告)日：2005-05-10
申请号：US09902277
申请日：2001-07-09
IPC分类号： H01L21/336 , H01L21/77 , H01L21/84 , H01L29/04 , H01L29/786 , H01L21/311
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
摘要翻译： 相对于衬底形成薄膜晶体管的方法包括：a）在衬底上提供多晶材料的薄膜晶体管层，所述多晶材料包括晶界; b）在多晶薄膜层附近提供含氟层; c）在一段温度和一段时间内退火含氟层，所述时间段有效地将氟从含氟层驱动到多晶薄膜层中，并且在晶界内引入氟以钝化所述晶界; 以及d）提供与所述薄膜晶体管层可操作地相邻的晶体管栅极。 薄膜晶体管可以被制造为底部门控或顶部门控。 可以在薄膜晶体管层和含氟层之间设置缓冲层，缓冲层在退火期间从含氟层透过氟。 优选地，退火温度足够高以将氟从含氟层驱动到多晶薄膜层中并且在晶界内引入氟以使所述晶界钝化，但是足够低以防止含氟层与 多晶薄膜层。
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公开(公告)号：US20110024762A1
公开(公告)日：2011-02-03
申请号：US12901981
申请日：2010-10-11
IPC分类号： H01L29/66
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
摘要翻译： 相对于衬底形成薄膜晶体管的方法包括：a）在衬底上提供多晶材料的薄膜晶体管层，所述多晶材料包括晶界; b）在多晶薄膜层附近提供含氟层; c）在一段温度和一段时间内退火含氟层，所述时间段有效地将氟从含氟层驱动到多晶薄膜层中，并且在晶界内引入氟以钝化所述晶界; 以及d）提供与所述薄膜晶体管层可操作地相邻的晶体管栅极。 薄膜晶体管可以被制造为底部门控或顶部门控。 可以在薄膜晶体管层和含氟层之间设置缓冲层，缓冲层在退火期间从含氟层透过氟。 优选地，退火温度足够高以将氟从含氟层驱动到多晶薄膜层中并且在晶界内引入氟以使所述晶界钝化，但是足够低以防止含氟层与 多晶薄膜层。
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公开(公告)号：US6001675A
公开(公告)日：1999-12-14
申请号：US872789
申请日：1997-06-10
IPC分类号： H01L21/336 , H01L21/77 , H01L21/84 , H01L29/04 , H01L29/786
CPC分类号： H01L29/78678 , H01L27/1214 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
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公开(公告)号：US5753543A
公开(公告)日：1998-05-19
申请号：US624683
申请日：1996-03-25
IPC分类号： H01L21/336 , H01L29/786 , H01L21/84
CPC分类号： H01L29/66765 , H01L29/78624 , H01L29/78648 , Y10S438/91
摘要： A method of forming a bottom gated TFT includes, a) providing a transistor gate relative to a substrate which projects outward thereof; b) providing a dielectric layer over the gate; c) providing a TFT layer of semiconductive material over the dielectric layer; the thin film transistor layer comprising a source area, a channel area, a drain area, and a drain offset area; d) providing a masking layer over the TFT layer; e) anisotropically etching the masking layer to define a masking sidewall spacer laterally adjacent the transistor gate over the drain offset area and leave the channel area outwardly exposed; f) with the masking sidewall spacer in place, implanting a conductivity enhancing impurity of a first type into the thin film channel area to provide a thin film channel region; and g) masking the channel area and the drain offset area while implanting conductivity enhancing impurity of a second type into the thin film source and drain areas to define thin film source and channel regions. Also contemplated is providing a fluorine containing layer over the polycrystalline thin film layer and over the sidewall spacer prior to the channel masking step, followed by annealing thereof at a temperature and for a time which in combination are effective to drive fluorine into the polycrystalline thin film layer and incorporate fluorine within grain boundaries in the polycrystalline thin film to passivate said grain boundaries. Top gated transistors are also contemplated, where the spacer is formed over a substrate elevation step.
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公开(公告)号：US20090047776A1
公开(公告)日：2009-02-19
申请号：US12257614
申请日：2008-10-24
IPC分类号： H01L21/28
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
摘要翻译： 相对于衬底形成薄膜晶体管的方法包括：a）在衬底上提供多晶材料的薄膜晶体管层，所述多晶材料包括晶界; b）在多晶薄膜层附近提供含氟层; c）在一段温度和一段时间内退火含氟层，所述时间段有效地将氟从含氟层驱动到多晶薄膜层中，并且在晶界内引入氟以钝化所述晶界; 以及d）提供与所述薄膜晶体管层可操作地相邻的晶体管栅极。 薄膜晶体管可以被制造为底部门控或顶部门控。 可以在薄膜晶体管层和含氟层之间设置缓冲层，缓冲层在退火期间从含氟层透过氟。 优选地，退火温度足够高以将氟从含氟层驱动到多晶薄膜层中并且在晶界内引入氟以使所述晶界钝化，但是足够低以防止含氟层与 多晶薄膜层。
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公开(公告)号：US07825414B2
公开(公告)日：2010-11-02
申请号：US12257614
申请日：2008-10-24
IPC分类号： H01L21/00
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
摘要翻译： 相对于衬底形成薄膜晶体管的方法包括：a）在衬底上提供多晶材料的薄膜晶体管层，所述多晶材料包括晶界; b）在多晶薄膜层附近提供含氟层; c）在一段温度和一段时间内退火含氟层，所述时间段有效地将氟从含氟层驱动到多晶薄膜层中，并且在晶界内引入氟以钝化所述晶界; 以及d）提供与所述薄膜晶体管层可操作地相邻的晶体管栅极。 薄膜晶体管可以被制造为底部门控或顶部门控。 可以在薄膜晶体管层和含氟层之间设置缓冲层，缓冲层在退火期间从含氟层透过氟。 优选地，退火温度足够高以将氟从含氟层驱动到多晶薄膜层中，并且在晶界内引入氟以钝化所述晶界，但是足够低以防止含氟层与 多晶薄膜层。
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公开(公告)号：US20080237601A1
公开(公告)日：2008-10-02
申请号：US12135761
申请日：2008-06-09
IPC分类号： H01L29/10
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
摘要翻译： 相对于衬底形成薄膜晶体管的方法包括：a）在衬底上提供多晶材料的薄膜晶体管层，所述多晶材料包括晶界; b）在多晶薄膜层附近提供含氟层; c）在一段温度和一段时间内退火含氟层，所述时间段有效地将氟从含氟层驱动到多晶薄膜层中，并且在晶界内引入氟以钝化所述晶界; 以及d）提供与所述薄膜晶体管层可操作地相邻的晶体管栅极。 薄膜晶体管可以被制造为底部门控或顶部门控。 可以在薄膜晶体管层和含氟层之间设置缓冲层，缓冲层在退火期间从含氟层透过氟。 优选地，退火温度足够高以将氟从含氟层驱动到多晶薄膜层中并且在晶界内引入氟以使所述晶界钝化，但是足够低以防止含氟层与 多晶薄膜层。
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公开(公告)号：US07385222B2
公开(公告)日：2008-06-10
申请号：US11021651
申请日：2004-12-22
IPC分类号： H01L21/00
CPC分类号： H01L29/78678 , H01L27/1214 , H01L27/127 , H01L29/04 , H01L29/6675 , H01L29/66757 , H01L29/66765 , H01L29/78672 , H01L29/78675
摘要： A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
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