公开(公告)号：US12085595B2

公开(公告)日：2024-09-10

申请号：US17965539

申请日：2022-10-13

Applicant: Gwanak Analog CO., LTD. ,  Seoul National University R&DB Foundation

Inventor： Minsung Kim ,  Suhwan Kim ,  Hyunjoong Lee

IPC: G01R27/26 ,  H03F3/45 ,  G01D5/24

CPC classification number: G01R27/2605 ,  H03F3/45475 ,  G01D5/24 ,  H03F2203/45116

Abstract: A read-out circuit includes an operational amplifier configured to receive input voltage via a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging/discharging circuit configured to charge or to discharge a sensor capacitor included in a sensor during a first time; and a switching circuit configured to connect the sensor capacitor and the operational amplifier during a second time after the sensor capacitor is charged or discharged.

公开(公告)号：US11774294B2

公开(公告)日：2023-10-03

申请号：US17063304

申请日：2020-10-05

Applicant: Gwanak Analog CO., LTD.

Inventor： Suhwan Kim

IPC: G01K3/00 ,  H03F3/16 ,  H03F3/45 ,  H03F3/08 ,  G01N15/02 ,  H03F3/00

CPC classification number: G01K3/005 ,  H03F3/16 ,  H03F3/45475 ,  H03F3/45744 ,  G01K2219/00 ,  G01N15/02 ,  G01N15/0205 ,  H03F3/005 ,  H03F3/087 ,  H03F3/45968 ,  H03F2200/375

Abstract: An amplifier includes an amplification circuit including an input circuit receiving an input signal and configured to output an output signal by amplifying the input signal; and an offset cancelling circuit configured to cancel offset by controlling the input circuit according to activation control signal and offset control signal, wherein the offset cancelling circuit cancels the offset according to the offset control signal after the activation control signal is activated.

公开(公告)号：US11133821B2

公开(公告)日：2021-09-28

申请号：US16863774

申请日：2020-04-30

Applicant: Gwanak Analog CO., LTD. ,  Seoul National University R&DB Foundation

Inventor： Suhwan Kim ,  Minsung Kim ,  Jaehoon Jun

IPC: H03M3/00 ,  H03M1/12 ,  H03M1/80 ,  H03M1/06 ,  H03M1/38

Abstract: A delta-sigma modulator generates a bit stream signal from an analog signal by operating according to a modulation period including a sampling period and a filtering period and includes a digital-to-analog converter (DAC) configured to generate a charge signal according to one of a first reference voltage and a second reference voltage according to the bit stream signal during the sampling period and to output a signal generated according to the charge signal and the other of the first reference voltage and the second reference voltage; a loop filter configured to charge a sampling signal corresponding to the analog signal during the sampling period and to filter an output from the DAC and a signal generated according to the sampling signal during the filtering period; and a quantizer configured to generate the bit stream signal according to an output from the loop filter in the modulation period.