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公开(公告)号:US20230029517A1
公开(公告)日:2023-02-02
申请号:US17789626
申请日:2020-01-22
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Isaac Lagnado , Christopher Charles Mohrman , Charles J. Stancil , Steven Petit , Jonathan Vu , Monji G. Jabori
IPC: H02J7/00 , G06F1/3212 , G16Y30/00
Abstract: In some examples, a computing device can include a component device, a battery, and a memory resource storing instructions to cause a processing resource to determine an operating mode of the computing device, in response to the operating mode being a charging mode, cause the battery to charge, in response to the operating mode being a system battery mode, cause the battery to power the computing device, and in response to the operating mode being a battery reserve mode, cause the battery to power the component device in absence of powering other components of the computing device.
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公开(公告)号:US20150213255A1
公开(公告)日:2015-07-30
申请号:US14419689
申请日:2012-09-24
Applicant: HEWLETT PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Jeffrey A. Lev , Monji G. Jabori , Wei Ze Liu , James R. Waldron
CPC classification number: G06F21/44 , G06F21/82 , G06F2221/2103 , G06F2221/2129
Abstract: An authentication system is disclosed herein. An example includes a computing device and a port associated with the computing device for connection of an accessory to the computing device. The example also includes an authentication device that generates an accessory response upon receipt of a challenge and a hardware controller. The hardware controller generates both the challenge and an expected response to the challenge. It compares the expected response to the accessory response to ascertain if the accessory response is one of a valid response and an invalid response, and it signals for the port to be enabled for the valid response to allow access to functionality of the accessory by the computing device. Other features and components of the authentication system are also disclosed herein, as is a method of authenticating an accessory for use by a computing device.
Abstract translation: 本文公开了认证系统。 一个示例包括计算设备和与计算设备相关联的端口,用于将附件连接到计算设备。 该示例还包括在接收到质询时生成附件响应的认证设备和硬件控制器。 硬件控制器产生挑战和对挑战的预期响应。 它将预期的响应与附件响应进行比较,以确定附件响应是否是有效响应和无效响应之一,并且它指示端口被启用以进行有效响应,以允许通过计算访问附件的功能 设备。 本文还公开了认证系统的其他特征和组件,以及验证附件以供计算设备使用的方法。
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公开(公告)号:US20230004514A1
公开(公告)日:2023-01-05
申请号:US17784844
申请日:2019-12-12
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Monji G. Jabori , Rahul Lakdawala , Jonathan Vu
Abstract: In some examples, a system comprises: a socket; a controller coupled to the socket; a storage device comprising machine-readable instructions; and a processor coupled to the controller and the storage device, wherein execution of the machine-readable instructions causes the processor to: detect a Secure Digital (SD) card in the socket via the controller; prompt a user to select a communication protocol to be utilized by the system to communicate with the SD card; and enable the system to communicate with the SD card based on the user selection.
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公开(公告)号:US20220217870A1
公开(公告)日:2022-07-07
申请号:US17608494
申请日:2019-09-06
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Owen P. Columbus , Jamil Abdul Wakil , Monji G. Jabori , Xiang Ma , Rafael Ibanez
Abstract: Example devices include a graphics processing unit (GPU), a central processing unit (CPU), and a vapor chamber. The 0 vapor chamber includes a first side in contact with the CPU and a second side in contact with the GPU. In addition, the vapor chamber includes a fluid disposed therein that is to vaporize to transfer heat from the GPU and the CPU.
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公开(公告)号:US20210263576A1
公开(公告)日:2021-08-26
申请号:US17258808
申请日:2018-11-13
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Monji G. Jabori , Qijun Chen , Roger D. Benson
Abstract: According to examples, an apparatus may include a power converter and a controller. The controller may intercept a power contract negotiation between a first device and a second device, spoof the first device and the second device with respect to each other, and determine a power contract between the first device and the second device. The controller may also supply power to the first device from an external power source through the power converter according to the power contract while enabling pass-through of a communication signal between the first device and the second device through the apparatus.
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公开(公告)号:US20210089404A1
公开(公告)日:2021-03-25
申请号:US16980880
申请日:2018-06-11
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Monji G. Jabori , Byron A. Alcorn , Jonathan Vu
IPC: G06F11/14 , G11C5/14 , G06F1/3203
Abstract: Example implementations relate to memory power termination delays. In some examples, a computing system may include a memory storage device, a memory controller, an input/output (I/O) controller, a power management controller (PMC), a bus compliant with an Enhanced Serial Peripheral Interface (eSPI) protocol, and a power control gating. The input/output controller may transmit a power termination command to the power management controller via the bus compliant with the eSPI protocol. Upon a receipt of the power termination command, the PMC may initiate a delay period of an assertion of the power termination command to the power control gating and transmit a memory transfer command to the memory controller included in the memory storage device. The memory controller, upon receipt of the memory transfer command, may move data stored in volatile memory to non-volatile memory included in the memory storage device. Upon expiration of the delay period, the PMC may assert the power termination command to the power control gating to remove power from the computing system.
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公开(公告)号:US20200210367A1
公开(公告)日:2020-07-02
申请号:US16481082
申请日:2017-09-06
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Monji G. Jabori , Jonathan Vu
Abstract: A system may include a computing device. The computing device may include an optical disc drive (ODD) bay, wherein an ODD is not present in the ODD bay. The system may further include an ODD connector. The system may also include an external serial AT attachment (eSATA) device located in an opening of the ODD bay for housing the non-present ODD and coupled to the computing device by the ODD connector at the ODD bay.
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公开(公告)号:US11429312B1
公开(公告)日:2022-08-30
申请号:US17343417
申请日:2021-06-09
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Wei Ze Liu , Monji G. Jabori , Rosilet Retnamoni Braduke , Sumit Kumar
IPC: G06F3/06
Abstract: In some examples, an electronic device comprises a multiplexer, a first device interface coupled to the multiplexer, a second device interface coupled to the multiplexer, a storage controller coupled to the multiplexer, and a controller coupled to the first device interface. The storage controller is to control a storage device. The controller is to determine a mode based on a command for the controller to access the storage controller and, based on the mode, cause the multiplexer to adjust access of the second device interface to the storage controller.
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公开(公告)号:US20210055844A1
公开(公告)日:2021-02-25
申请号:US16977845
申请日:2018-04-30
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Thong Thai , Monji G. Jabori , Simon Wong
IPC: G06F3/0488 , G06F3/0482 , G06F3/14
Abstract: An example electronic device includes a storage device to store second content associated with first content. The electronic device also includes a controller to: receive the first content and identification information of the first content from a host device; present the first content in a first virtual display; present the second content in a second virtual display based on the identification information; receive touch information of a touch input; determine a destination of the touch input; when the destination is the first virtual display, transmit converted touch information of the touch input to host device; and when the destination is the second virtual display, process the touch input to determine content operation information associated with the first content and transmit the content operation information to the host device.
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公开(公告)号:US10860366B2
公开(公告)日:2020-12-08
申请号:US15307741
申请日:2014-04-30
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Syed S. Azam , Mike Provencher , Monji G. Jabori , Valentin Popescu
IPC: G06F9/46 , G06F9/48 , G06F3/14 , G09G5/14 , G06F3/0481
Abstract: An example method of managing multi-architecture system input in accordance with aspects of the present disclosure includes receiving an input from a first processing unit in the multi-architecture system, receiving an input from a second processing unit in the multi-architecture system, combining the inputs, and providing the combined inputs to a display unit. The display unit displays the combined inputs in a configurable orientation.
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