公开(公告)号：US20190235598A1

公开(公告)日：2019-08-01

申请号：US15884723

申请日：2018-01-31

Applicant: Hewlett Packard Enterprise Development LP

Inventor： John Norton ,  James Jeffery Schulze ,  Reza M. Bacchus ,  Robert C. Elliott ,  Troy Anthony Della Fiora ,  Keith Sauer ,  Darrel G. Gaston

IPC: G06F1/30 ,  H05K7/14 ,  G06F1/26 ,  G06F1/28 ,  G11B33/12

CPC classification number: G06F1/30 ,  G06F1/263 ,  G06F1/28 ,  G11B33/122 ,  H05K7/1487 ,  H05K7/1489 ,  H05K7/1492 ,  H05K7/1498

Abstract: An example apparatus comprises a drive carrier assembly which may include a memory device, and an energy storage device having at least a portion thereof encased in a housing. In some examples, the apparatus may include a printed circuit assembly to detect a power failure of a host computing device. The printed circuit assembly, may have a first portion coupled to the energy storage device and a second portion coupled to a backplane of the host computing device.

公开(公告)号：US11132042B2

公开(公告)日：2021-09-28

申请号：US15884723

申请日：2018-01-31

Applicant: Hewlett Packard Enterprise Development LP

Inventor： John Norton ,  James Jeffery Schulze ,  Reza M. Bacchus ,  Robert C. Elliott ,  Troy Anthony Della Fiora ,  Keith Sauer ,  Darrel G. Gaston

IPC: G06F11/07 ,  G06F1/30 ,  H05K7/14 ,  G06F1/26 ,  G06F1/28 ,  G06F1/18 ,  G06F1/16 ,  G11B33/12

Abstract: An example apparatus comprises a drive carrier assembly which may include a memory device, and an energy storage device having at least a portion thereof encased in a housing. In some examples, the apparatus may include a printed circuit assembly to detect a power failure of a host computing device. The printed circuit assembly, may have a first portion coupled to the energy storage device and a second portion coupled to a backplane of the host computing device.

公开(公告)号：US11232848B2

公开(公告)日：2022-01-25

申请号：US15540491

申请日：2015-04-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Reza M. Bacchus

IPC: G11C29/44 ,  G11C29/42 ,  G11C5/04 ,  G11C29/04

Abstract: In some examples, a memory module includes an error status indicator, an error address register, and error tracking circuitry. The error tracking circuitry may detect that memory data stored at a memory address for the memory module includes an error. In response, and without overwriting the memory data stored at the memory address, the error tracking circuitry may set the error status indicator and store the memory address in the error address register.

公开(公告)号：US10777294B2

公开(公告)日：2020-09-15

申请号：US16066110

申请日：2016-01-26

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Melvin K. Benedict ,  Reza M. Bacchus ,  Chi-li-ma Harnold

IPC: G11C29/00 ,  G11C29/42 ,  G11C29/02 ,  G06F11/22 ,  G06F11/10 ,  G11C29/52

Abstract: One example includes a system. The system includes an error injection system. The error injection system includes an error injector to store a programmable control structure to define a memory error. The error injector being further used to inject the memory error into a respective one of a plurality of memory storage elements associated with a memory system at a predetermined address via an address controller and to determine if the memory error at the predetermined address associated with the respective one of the plurality of memory storage elements is corrected via error-correcting code (ECC) memory associated with the memory system.

公开(公告)号：US20170372799A1

公开(公告)日：2017-12-28

申请号：US15540491

申请日：2015-04-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Reza M. Bacchus

IPC: G11C29/44 ,  G11C29/42 ,  G11C5/04

CPC classification number: G11C29/44 ,  G11C5/04 ,  G11C29/42 ,  G11C2029/0409 ,  G11C2029/4402

Abstract: In some examples, a memory module includes an error status indicator, an error address register, and error tracking circuitry. The error tracking circuitry may detect that memory data stored at a memory address for the memory module includes an error. In response, and without overwriting the memory data stored at the memory address, the error tracking circuitry may set the error status indicator and store the memory address in the error address register.

公开(公告)号：US20190013085A1

公开(公告)日：2019-01-10

申请号：US16066110

申请日：2016-01-26

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Melvin K. Benedict ,  Reza M. Bacchus ,  Chi-li-ma Harnold

IPC: G11C29/42 ,  G06F11/10 ,  G11C29/52

CPC classification number: G11C29/42 ,  G06F11/1068 ,  G06F11/2215 ,  G11C29/02 ,  G11C29/52

Abstract: One example includes a system. The system includes an error injection system. The error injection system includes an error injector to store a programmable control structure to define a memory error. The error injector being further used to inject the memory error into a respective one of a plurality of memory storage elements associated with a memory system at a predetermined address via an address controller and to determine if the memory error at the predetermined address associated with the respective one of the plurality of memory storage elements is corrected via error-correcting code (ECC) memory associated with the memory system.

公开(公告)号：US09928897B2

公开(公告)日：2018-03-27

申请号：US15500070

申请日：2015-02-27

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Reza M. Bacchus ,  Melvin K. Benedict ,  Stephen F. Contreras ,  Eric L. Pope ,  Chi K. Sides ,  Chun-Pin Huang

IPC: G11C5/06 ,  G11C11/4074 ,  G11C5/10

CPC classification number: G11C11/4074 ,  G11C5/04 ,  G11C5/06 ,  G11C5/10 ,  G11C5/14 ,  G11C5/147 ,  G11C11/401

Abstract: An example device in accordance with an aspect of the present disclosure includes a memory module having a voltage regulator module (VRM) to receive input power and deliver output power to components of the memory module at a first power plane. At least one stitching capacitor is to couple the first power plane to a second power plane.