-
公开(公告)号：US10437519B2
公开(公告)日：2019-10-08
申请号：US15992516
申请日：2018-05-30
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Chun Xue , Liang Shi , Congming Gao
Abstract: A method for processing a write request is disclosed, the method includes: determining, by an IO scheduler, that current IO scheduling is in a blocked state; selecting, by the IO scheduler, a target synchronous write request from to-be-processed IO requests; adding, by the IO scheduler, an acceleration flag to the target synchronous write request, where the acceleration flag is used to instruct a flash memory controller to perform acceleration processing on the target synchronous write request by using idle space of a flash memory; after the flash memory controller receives, from the IO scheduler, the target synchronous write request, determining, by the flash memory controller, a size of the idle space of the flash memory; and when the size of the idle space of the flash memory is greater than a threshold, performing, by the flash memory controller, acceleration processing on the target synchronous write request.
-
公开(公告)号：US10732898B2
公开(公告)日：2020-08-04
申请号：US16105723
申请日：2018-08-20
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Liang Shi , Chun Xue , Qiao Li , Dongfang Shan , Jun Xu , Yuangang Wang
Abstract: A method for accessing a flash memory device and a flash memory device. After receiving a write request for an address, a flash memory controller obtains an indicator of the address, where the indicator indicates a last access type of the address, which might be a write operation or a read operation. When determining the indicator indicates a write operation, which means the access type for the address is normally write operation, to save time, the flash memory controller perform a fast-write operation on the address, when the indicator indicates a read operation, which means there might be plenty of read operations on the address, to facilitate future read operation, the controller performs a slow-write operation on the address.
-
Patent Agency Ranking
公开(公告)号：US20180374546A1
公开(公告)日：2018-12-27
申请号：US16120780
申请日：2018-09-04
Applicant: HUAWEI TECHNOLOGIES CO.,LTD.
Inventor： Liang Shi , Yejia Di , Hsing Mean SHA , Yuangang Wang , Dongfang Shan
Abstract: A flash memory controller refreshes memory blocks in a flash memory device by setting different refresh cycles for individual memory blocks in the flash memory device. The flash memory controller records a number of erase operations performed on each memory block of the flash memory device. Upon detecting that a bit error rate of a memory block is greater than a preset threshold, the flash memory controller determines a refresh cycle for the memory block based on recorded number of erase operations performed on the memory block, and then refreshes the memory block according to the refresh cycle.
-
公开(公告)号：US20180275925A1
公开(公告)日：2018-09-27
申请号：US15992516
申请日：2018-05-30
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Chun XUE , Liang Shi , Congming Gao
CPC classification number: G06F3/0659 , G06F3/06 , G06F3/061 , G06F3/0679 , G06F12/0246 , H04W88/02
Abstract: A method for processing a write request is disclosed, the method includes: determining, by an IO scheduler, that current IO scheduling is in a blocked state; selecting, by the IO scheduler, a target synchronous write request from to-be-processed IO requests; adding, by the IO scheduler, an acceleration flag to the target synchronous write request, where the acceleration flag is used to instruct a flash memory controller to perform acceleration processing on the target synchronous write request by using idle space of a flash memory; after the flash memory controller receives, from the IO scheduler, the target synchronous write request, determining, by the flash memory controller, a size of the idle space of the flash memory; and when the size of the idle space of the flash memory is greater than a threshold, performing, by the flash memory controller, acceleration processing on the target synchronous write request.
-
公开(公告)号：US10796774B2
公开(公告)日：2020-10-06
申请号：US16120780
申请日：2018-09-04
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Liang Shi , Yejia Di , Hsing Mean Sha , Yuangang Wang , Dongfang Shan
IPC: G11C16/34 , G06F11/10 , G11C16/04 , G11C16/10 , G11C16/14 , G11C16/26 , G11C29/52 , G11C11/56 , H01L29/788
Abstract: A flash memory controller refreshes memory blocks in a flash memory device by setting different refresh cycles for individual memory blocks in the flash memory device. The flash memory controller records a number of erase operations performed on each memory block of the flash memory device. Upon detecting that a bit error rate of a memory block is greater than a preset threshold, the flash memory controller determines a refresh cycle for the memory block based on recorded number of erase operations performed on the memory block, and then refreshes the memory block according to the refresh cycle.
-
公开(公告)号：US12169432B2
公开(公告)日：2024-12-17
申请号：US17955695
申请日：2022-09-29
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Liang Shi , Xiaolong Shen , Weilan Wang , Junfeng Zhao , Fangmin Lu , Xin Yan
IPC: G06F1/00 , G06F1/3296 , G06F9/4401
Abstract: A device suspension method and a computing device are provided. In the method, before a device enters a suspended state, memory space occupied by a background process that is unrelated to a foreground process is released. In this way, the background process unrelated to the foreground process is not saved in a memory of the device. In other words, it reduces data stored in the memory when the device is suspended. Therefore, when the device needs to be woken up, only a relatively small amount of data needs to be read from the memory, and a working state can be rapidly restored. This can reduce a delay of reading data from the memory when the device is woken up, thereby accelerating a wakeup speed of the device. In addition, the data is stored in the memory when the device is suspended.
-
公开(公告)号：US20180357013A1
公开(公告)日：2018-12-13
申请号：US16105723
申请日：2018-08-20
Applicant: HUAWEI TECHNOLOGIES CO.,LTD.
Inventor： Liang Shi , Chun Xue , Qiao Li , Dongfang Shan , Jun Xu , Yuangang Wang
IPC: G06F3/06
Abstract: A method for accessing a flash memory device and a flash memory device. After receiving a write request for an address, a flash memory controller obtains an indicator of the address, where the indicator indicates a last access type of the address, which might be a write operation or a read operation. When determining the indicator indicates a write operation, which means the access type for the address is normally write operation, to save time, the flash memory controller perform a fast-write operation on the address, when the indicator indicates a read operation, which means there might be plenty of read operations on the address, to facilitate future read operation, the controller performs a slow-write operation on the address.
-
-
-
-
-
-
Search Results
7
records
(took 0.017 seconds)
