利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

97 条记录 (耗时 0.017 秒)

    Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication
    3.
    发明授权
    Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication 有权
    具有硅锗源/漏扩展的应变硅PMOS及其制造方法

    公开(公告)号：US06703648B1

    公开(公告)日：2004-03-09

    申请号：US10282559

    申请日：2002-10-29

    申请人： Qi Xiang ,  Eric N. Paton ,  Haihong Wang

    发明人： Qi Xiang ,  Eric N. Paton ,  Haihong Wang

    IPC分类号： H01L2904

    CPC分类号： H01L29/6656 ,  H01L29/1054 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/7848 ,  H01L29/802 ,  Y10S438/933

    摘要： A strained silicon p-type MOSFET utilizes a strained silicon channel region formed on a silicon germanium substrate. Silicon germanium regions are formed to the silicon germanium layer adjacent to ends of the strained silicon channel region, and shallow source and drain extensions are implanted in the silicon germanium material. The shallow source and drain extensions do not extend into the strained silicon channel region. By forming the source and drain extensions in silicon germanium material rather than in silicon, source and drain extension distortions caused by the enhanced diffusion rate of boron in silicon are avoided.

    摘要翻译： 应变硅p型MOSFET利用形成在硅锗衬底上的应变硅沟道区。 硅锗区形成在邻近于应变硅沟道区的端部的硅锗层上，并且浅的源极和漏极延伸部被注入到硅锗材料中。 浅源极和漏极延伸部分不延伸到应变硅沟道区域。 通过在硅锗材料而不是在硅中形成源极和漏极延伸，避免了由硅中的增强的扩散速率引起的源极和漏极扩展失真。

    Method of measuring gate capacitance to determine the electrical thickness of gate dielectrics
    4.
    发明授权
    Method of measuring gate capacitance to determine the electrical thickness of gate dielectrics 失效
    测量栅极电容以确定栅极电介质的电学厚度的方法

    公开(公告)号：US06465267B1

    公开(公告)日：2002-10-15

    申请号：US09824408

    申请日：2001-04-02

    申请人： Haihong Wang ,  Qi Xiang

    发明人： Haihong Wang ,  Qi Xiang

    IPC分类号： H01L2166

    CPC分类号： H01L22/12

    摘要： The disclosure describes an exemplary method of measuring gate capacitance to determine electrical thickness of a gate dielectric located in a gate structure of a metal oxide semiconductor field effect transistor (MOSFET). This method can include connecting a meter to an integrated circuit gate structure and an active region located proximate the integrated circuit gate structure, applying forward body bias to the transistor to reduce the electrical field of the transistor at a gate inversion measuring point; and measuring capacitance from the meter while the transistor receives the forward body bias.

    摘要翻译： 本公开描述了测量栅极电容以确定位于金属氧化物半导体场效应晶体管（MOSFET）的栅极结构中的栅极电介质的电学厚度的示例性方法。 该方法可以包括将仪表连接到集成电路栅极结构和位于集成电路栅极结构附近的有源区，向晶体管施加正向偏置以减小栅极反转测量点处晶体管的电场; 并且当晶体管接收到正向偏置时，测量来自仪表的电容。

    Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication
    5.
    发明授权
    Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication 有权
    具有改善的源极/漏极延伸掺杂剂扩散电阻的应变硅MOSFET及其制造方法

    公开(公告)号：US07170084B1

    公开(公告)日：2007-01-30

    申请号：US10872707

    申请日：2004-06-21

    申请人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

    发明人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

    IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

    CPC分类号： H01L29/66477 ,  H01L21/26586 ,  H01L29/1045 ,  H01L29/1054 ,  H01L29/665

    摘要： An n-type MOSFET (NMOS) is implemented on a substrate having an epitaxial layer of strained silicon formed on a layer of silicon germanium. The MOSFET includes first halo regions formed in the strained silicon layer that extent toward the channel region beyond the ends of shallow source and drain extensions. Second halo regions formed in the underlying silicon germanium layer extend toward the channel region beyond the ends of the shallow source and drain extensions and extend deeper into the silicon germanium layer than the shallow source and drain extensions. The p-type dopant of the first and second halo regions slows the high rate of diffusion of the n-type dopant of the shallow source and drain extensions through the silicon germanium toward the channel region. By counteracting the increased diffusion rate of the n-type dopant in this manner, the shallow source and drain extension profiles are maintained and the risk of degradation by short channel effects is reduced.

    摘要翻译： 在具有形成在硅锗层上的应变硅的外延层的衬底上实施n型MOSFET（NMOS）。 MOSFET包括形成在应变硅层中的第一晕圈，其范围朝向超过浅源极和漏极延伸端的沟道区域。 形成在下面的硅锗层中的第二晕圈延伸到超过浅源极和漏极延伸端的沟道区，并且比浅源极和漏极延伸部更深地延伸到硅锗层中。 第一和第二晕圈区域的p型掺杂剂减缓了浅源极和漏极延伸部分的n型掺杂剂通过硅锗朝向沟道区的高扩散速率。 通过以这种方式抵消增加的n型掺杂剂的扩散速率，维持浅的源极和漏极延伸分布，并且降低由短沟道效应引起的退化的风险。

    Semiconductor device having a thick strained silicon layer and method of its formation
    6.
    发明授权
    Semiconductor device having a thick strained silicon layer and method of its formation 有权
    具有厚的应变硅层的半导体器件及其形成方法

    公开(公告)号：US06902991B2

    公开(公告)日：2005-06-07

    申请号：US10282513

    申请日：2002-10-24

    申请人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

    发明人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

    IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/336 ,  H01L21/337 ,  H01L29/10 ,  H01L21/04

    CPC分类号： H01L29/1054 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66795 ,  H01L29/66893

    摘要： A strained silicon layer is grown on a layer of silicon germanium and a second layer of silicon germanium is grown on the layer of strained silicon in a single continuous in situ deposition process. Both layers of silicon germanium may be grown in situ with the strained silicon. This construction effectively provides dual substrates at both sides of the strained silicon layer to support the tensile strain of the strained silicon layer and to resist the formation of misfit dislocations that may be induced by temperature changes during processing. Consequently the critical thickness of strained silicon that can be grown on substrates having a given germanium content is effectively doubled. The silicon germanium layer overlying the strained silicon layer may be maintained during MOSFET processing to resist creation of misfit dislocations in the strained silicon layer up to the time of formation of gate insulating material.

    摘要翻译： 在硅锗层上生长应变硅层，并且在单个连续原位沉积工艺中，在应变硅层上生长第二层硅锗。 硅锗的两层可以用应变硅原位生长。 这种结构在应变硅层的两侧有效地提供了两个基板，以支撑应变硅层的拉伸应变，并且抵抗可能在加工过程中温度变化引起的失配位错的形成。 因此，可以在具有给定锗含量的衬底上生长的应变硅的临界厚度被有效地加倍。 覆盖应变硅层的硅锗层可以在MOSFET加工过程中保持，以抵抗在形成栅极绝缘材料时产生应变硅层中的失配位错。

    Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication
    8.
    发明授权
    Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication 有权
    具有改善的源极/漏极延伸掺杂剂扩散电阻的应变硅MOSFET及其制造方法

    公开(公告)号：US06756276B1

    公开(公告)日：2004-06-29

    申请号：US10335522

    申请日：2002-12-31

    申请人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

    发明人： Qi Xiang ,  Jung-Suk Goo ,  Haihong Wang

    IPC分类号： H01L21336

    CPC分类号： H01L29/66477 ,  H01L21/26586 ,  H01L29/1045 ,  H01L29/1054 ,  H01L29/665

    摘要： An n-type MOSFET (NMOS) is implemented on a substrate having an epitaxial layer of strained silicon formed on a layer of silicon germanium. The MOSFET includes first halo regions formed in the strained silicon layer that extent toward the channel region beyond the ends of shallow source and drain extensions. Second halo regions formed in the underlying silicon germanium layer extend toward the channel region beyond the ends of the shallow source and drain extensions and extend deeper into the silicon germanium layer than the shallow source and drain extensions. The p-type dopant of the first and second halo regions slows the high rate of diffusion of the n-type dopant of the shallow source and drain extensions through the silicon germanium toward the channel region. By counteracting the increased diffusion rate of the n-type dopant in this manner, the shallow source and drain extension profiles are maintained and the risk of degradation by short channel effects is reduced.

    摘要翻译： 在具有形成在硅锗层上的应变硅的外延层的衬底上实施n型MOSFET（NMOS）。 MOSFET包括形成在应变硅层中的第一晕圈，其范围朝向超过浅源极和漏极延伸端的沟道区域。 形成在下面的硅锗层中的第二晕圈延伸到超过浅源极和漏极延伸端的沟道区，并且比浅源极和漏极延伸部更深地延伸到硅锗层中。 第一和第二晕圈区域的p型掺杂剂减缓了浅源极和漏极延伸部分的n型掺杂剂通过硅锗朝向沟道区的高扩散速率。 通过以这种方式抵消增加的n型掺杂剂的扩散速率，维持浅的源极和漏极延伸分布，并且降低由短沟道效应引起的退化的风险。

    Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication
    10.
    发明授权
    Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication 有权
    具有硅锗源/漏扩展的应变硅PMOS及其制造方法

    公开(公告)号：US07071065B1

    公开(公告)日：2006-07-04

    申请号：US10738716

    申请日：2003-12-17

    申请人： Qi Xiang ,  Eric N. Paton ,  Haihong Wang

    发明人： Qi Xiang ,  Eric N. Paton ,  Haihong Wang

    IPC分类号： H01L21/336

    CPC分类号： H01L29/6656 ,  H01L29/1054 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/7848 ,  H01L29/802 ,  Y10S438/933

    摘要： A strained silicon p-type MOSFET utilizes a strained silicon channel region formed on a silicon germanium substrate. Silicon germanium regions are formed on the silicon germanium layer adjacent to ends of the strained silicon channel region, and shallow source and drain extensions are implanted in the silicon germanium material. The shallow source and drain extensions do not extend into the strained silicon channel region. By forming the source and drain extensions in silicon germanium material rather than in silicon, source and drain extension distortions caused by the enhanced diffusion rate of boron in silicon are avoided.

    摘要翻译： 应变硅p型MOSFET利用形成在硅锗衬底上的应变硅沟道区。 在邻近于应变硅沟道区的端部的硅锗层上形成硅锗区，并且在硅锗材料中注入浅的源极和漏极延伸。 浅源极和漏极延伸部分不延伸到应变硅沟道区域。 通过在硅锗材料而不是在硅中形成源极和漏极延伸，避免了由硅中的增强的扩散速率引起的源极和漏极扩展失真。