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公开(公告)号：US5712652A
公开(公告)日：1998-01-27
申请号：US602599
申请日：1996-02-16
申请人： Hajime Sato , Shuichiro Ishizawa , Nozomu Harada , Kiyofumi Ochii , Shigeyuki Hayakawa , Yoshiro Aoki
发明人： Hajime Sato , Shuichiro Ishizawa , Nozomu Harada , Kiyofumi Ochii , Shigeyuki Hayakawa , Yoshiro Aoki
IPC分类号： G02F1/1333 , G02F1/133 , G02F1/136 , G02F1/1368 , G06F3/033 , G09G3/36 , H04N5/66
CPC分类号： G09G3/3688 , G06F3/03542 , G09G3/3648 , G09G3/3659 , G09G2300/0842 , G09G2300/0857 , G09G2310/0232 , G09G2330/021
摘要： A liquid crystal display device of low power consumption is disclosed, which is suitable for use with a portable data processing apparatus, in particular. The liquid crystal display device, comprises: a switch element array substrate (301) having a plurality of data lines (1) and a plurality of scanning lines (2) both arranged being intersected to each other in a matrix form so as to form matrix intersection points; a plurality of pixel electrodes (3) each arranged for each matrix intersection point; and a plurality of first switching elements (6, 7) each arranged for each matrix intersection point and each turned on or off by the scanning line, for applying write voltage supplied from the data line to the pixel electrode, respectively when turned on; a counter substrate (314) having a plurality of counter electrodes (12) each arranged being opposed to each pixel electrode with a gap between the two; a liquid crystal layer (13) sandwiched between the switching element array substrate and the counter substrate; a plurality of memory elements (100) each interposed between the corresponding first switching element and the corresponding pixel electrode, for holding the write voltage supplied through the data line as data, when the first switching element is turned on; a plurality of display control lines (8, 10) each arranged in correspondence to each scanning line; and a plurality of second switching elements (9, 11) each arranged for each matrix intersection point, for controlling connection between the pixel electrode and the display control line on the basis of output of the memory element.
摘要翻译： 公开了一种低功耗的液晶显示装置，其特别适用于便携式数据处理装置。 液晶显示装置包括：具有多个数据线（1）和多个扫描线（2）的开关元件阵列基板（301），两个扫描线（2）以矩阵形式彼此相交以形成矩阵 交点; 每个矩阵交点设置多个像素电极（3）; 以及多个第一开关元件（6,7），每个第一开关元件分别布置在每个矩阵交点上，并且每个由扫描线导通或截止，用于当打开时分别将从数据线提供的写入电压施加到像素电极; 具有多个对置电极（12）的对置基板（314），每个对置电极（12）与每个像素电极相对设置，在两者之间具有间隙; 夹在开关元件阵列基板和对置基板之间的液晶层（13）; 当所述第一开关元件导通时，分别插入在所述对应的第一开关元件和所述对应的像素电极之间的多个存储元件（100），用于保持通过所述数据线提供的写入电压作为数据; 多个显示控制线（8,10），每个显示控制线对应于每条扫描线布置; 以及多个第二开关元件（9,11），每个第二开关元件（9,11）被布置用于每个矩阵交点，用于基于存储元件的输出来控制像素电极和显示控制线之间的连接。
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公开(公告)号：US06639575B1
公开(公告)日：2003-10-28
申请号：US09531162
申请日：2000-03-17
申请人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
发明人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
IPC分类号： G09G336
CPC分类号： G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2330/02
摘要： There is provided a driving circuit including active matrix type liquid crystal display capable of decreasing the electric power consumption of CMOS buffers contained in a scanning line driving circuit and picture signal line driving circuit. The liquid crystal display has an active matrix type liquid crystal display elements comprising switching elements connected to a plurality of scanning lines and a plurality of picture signal lines perpendicular to the scanning lines. The liquid crystal display includes a digital circuit wherein at least one of a scanning line driving circuit for applying a scanning pulse to the switching elements via the scanning lines and a picture signal line driving circuit for applying a picture signal to the picture signal lines comprises one stage of CMOS buffer or a plurality of CMOS buffers connected in multi stages, the CMOS transistor or each of the CMOS transistors including an N-type thin-film transistor and P-type thin-film transistor which are formed on the same substrate. In the liquid crystal display, one transistor, which has a longer off-state time during operation of the circuit, of the N-type thin-film transistor and P-type thin-film transistor constituting the CMOS buffer, has a longer gate length than that of the other transistor.
摘要翻译： 提供了一种包括有源矩阵型液晶显示器的驱动电路，其能够降低包含在扫描线驱动电路和图像信号线驱动电路中的CMOS缓冲器的功耗。 液晶显示器具有有源矩阵型液晶显示元件，其包括连接到多条扫描线的开关元件和垂直于扫描线的多条图像信号线。 液晶显示器包括数字电路，其中用于经由扫描线向扫描脉冲施加扫描脉冲的扫描线驱动电路和用于向图像信号线施加图像信号的图像信号线驱动电路中的至少一个包括一个 CMOS缓冲器或者多级连接的CMOS缓冲器级，CMOS晶体管或者每个CMOS晶体管包括形成在同一衬底上的N型薄膜晶体管和P型薄膜晶体管。 在液晶显示器中，在构成CMOS缓冲器的N型薄膜晶体管和P型薄膜晶体管中，在电路工作期间具有较长截止时间的一个晶体管具有较长的栅极长度 比另一个晶体管。
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公开(公告)号：US06268894B1
公开(公告)日：2001-07-31
申请号：US08655771
申请日：1996-05-31
申请人： Yoshiro Aoki , Hajime Sato
发明人： Yoshiro Aoki , Hajime Sato
IPC分类号： G02F11343
CPC分类号： G02F1/136213
摘要： A liquid crystal display apparatus having a plurality of pixel cells is disclosed, each of which comprising a scanning line and a signal line disposed on an insulation substrate in such a manner that the scanning line intersects with the signal line, a switching device disposed at the intersection of the scanning line and the signal line, a display pixel electrode electrically connected to the switching device, an opposite electrode disposed opposite to the display pixel electrode through a liquid crystal layer, and an auxiliary capacitor line disposed in a space between two adjacent display pixel electrodes in parallel with the scanning line and capacitively coupled with the display pixel electrode so as to form an auxiliary capacitor, wherein the scanning line overlaps with the display pixel electrode.
摘要翻译： 公开了一种具有多个像素单元的液晶显示装置，每个像素单元包括扫描线和设置在绝缘基板上的信号线，使得扫描线与信号线相交，切换装置设置在 扫描线和信号线的交点，与开关装置电连接的显示像素电极，通过液晶层与显示像素电极相对设置的对置电极，以及设置在两个相邻显示器之间的空间中的辅助电容线 像素电极与扫描线并联并与显示像素电极电容耦合以形成辅助电容器，其中扫描线与显示像素电极重叠。
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4.发明授权Driving circuit for display apparatus with paired sample-hold circuits sampling positive and negative phase picture signal components for column electrode driving 失效具有配对采样保持电路的显示装置的驱动电路，用于对列电极驱动采样正负相位图像信号分量
公开(公告)号：US6025835A
公开(公告)日：2000-02-15
申请号：US645766
申请日：1996-05-14
申请人： Yoshiro Aoki , Hajime Sato
发明人： Yoshiro Aoki , Hajime Sato
CPC分类号： G09G3/3688 , G09G2310/0297 , G09G2320/0204 , G09G3/3614
摘要： A first common line for supplying a positive phase picture signal and a second common line for supplying a negative phase picture signal are disclosed. A plurality of first switch devices are connected to the first common line. A plurality of second switch devices are connected to the second common line. Each of the first switch devices and each of the second switch devices are paired and connected to one signal line. A first operational amplifier is disclosed between each of the first switch devices and the signal line. The first operational amplifier operates in common with the first switch device group. A second operational amplifier is disclosed between each of the second switch devices and the signal line. The second operational amplifier operates in common with the second switch device group. A common control signal is input from a timing control circuit to the pair of each of the first switch devices and each of the second switch devices. A picture signal is output from the first switch device or the second switch device that is enabled by the first or second operational amplifier.
摘要翻译： 公开了用于提供正相位图像信号的第一公共线和用于提供负相位图像信号的第二公共线。 多个第一开关装置连接到第一公共线。 多个第二开关装置连接到第二公共线。 第一开关装置和第二开关装置中的每一个被配对并连接到一个信号线。 第一运算放大器公开在每个第一开关器件和信号线之间。 第一个运算放大器与第一个开关器件组共同工作。 第二运算放大器公开在每个第二开关装置和信号线之间。 第二运算放大器与第二开关器件组共同工作。 公共控制信号从定时控制电路输入到每对第一开关装置和第二开关装置中的每一个。 从第一或第二运算放大器使能的第一开关器件或第二开关器件输出图像信号。
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公开(公告)号：US07550371B2
公开(公告)日：2009-06-23
申请号：US11729292
申请日：2007-03-27
IPC分类号： H01L21/425
CPC分类号： H01L21/76243
摘要： A SIMOX wafer is produced by implanting an oxygen ions into a surface of a Si substrate and then conducting a high-temperature annealing, in which an atmosphere in at least an end stage of the high-temperature annealing treatment is an Ar or N2 atmosphere containing an oxygen of more than 3 volume % but not more than 10 volume %.
摘要翻译： 通过将氧离子注入到Si衬底的表面中然后进行高温退火来制造SIMOX晶片，其中至少在高温退火处理的最后阶段的气氛是含有Ar 大于3体积％但不大于10体积％的氧气。
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公开(公告)号：US07286109B2
公开(公告)日：2007-10-23
申请号：US10846550
申请日：2004-05-17
申请人： Yoshiro Aoki
发明人： Yoshiro Aoki
IPC分类号： G09G3/36
CPC分类号： G09G3/3233 , G09G3/325 , G09G3/3266 , G09G2300/0417 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0251 , G09G2310/0262 , G09G2320/0223 , G09G2320/043
摘要： Buffer circuits are provided between outputs of a scanning line driver circuit and scanning lines. The buffer circuits each are configured to make rise or fall time of scanning signals at output sides of the buffer circuits substantially the same as or longer than those of the scanning signals at end terminals of the scanning lines when the scanning signals supplied to the scanning lines are rectangular in waveform.
摘要翻译： 在扫描线驱动电路的输出和扫描线之间提供缓冲电路。 各个缓冲电路被配置为当提供给扫描线的扫描信号时，缓冲电路的输出侧的扫描信号的上升或下降时间基本上等于或长于扫描线的端部的扫描信号的扫描信号的上升或下降时间 是波形的矩形。
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公开(公告)号：US20070224774A1
公开(公告)日：2007-09-27
申请号：US11729292
申请日：2007-03-27
IPC分类号： H01L21/76
CPC分类号： H01L21/76243
摘要： A SIMOX wafer is produced by implanting an oxygen ions into a surface of a Si substrate and then conducting a high-temperature annealing, in which an atmosphere in at least an end stage of the high-temperature annealing treatment is an Ar or N2 atmosphere containing an oxygen of more than 3 volume % but not more than 10 volume %.
摘要翻译： 通过将氧离子注入到Si衬底的表面中然后进行高温退火来制造SIMOX晶片，其中至少在高温退火处理的最后阶段中的气氛为Ar或N 2 气氛。
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公开(公告)号：US07253069B2
公开(公告)日：2007-08-07
申请号：US11101870
申请日：2005-04-08
申请人： Yoshio Murakami , Toru Yamazaki , Yoshiro Aoki , Akihiko Endo
发明人： Yoshio Murakami , Toru Yamazaki , Yoshiro Aoki , Akihiko Endo
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L21/76254 , H01L21/76243
摘要： A method for manufacturing a SOI wafer includes a step of heat-treating a wafer in a furnace to form an SOI wafer including a silicon support, an insulating layer containing oxide, and a superficial silicon layer arranged in that order and a step of unloading the SOI wafer from the furnace maintained at a temperature of 250° C. to 800° C. to transfer the SOI wafer to an atmosphere containing hydrogen or water. The steps are performed in that order.
摘要翻译： 一种SOI晶片的制造方法，其特征在于，在炉内对晶片进行热处理，形成包括硅载体，含有氧化物的绝缘层和表面硅层的SOI晶片的步骤， 来自炉的SOI晶片保持在250℃至800℃的温度下，以将SOI晶片转移到含有氢或水的气氛中。 按照该顺序执行步骤。
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公开(公告)号：US20060221251A1
公开(公告)日：2006-10-05
申请号：US11277580
申请日：2006-03-27
IPC分类号： H04N9/77
CPC分类号： G09G3/325 , G09G3/006 , G09G2300/0426 , G09G2300/0819 , G09G2330/04 , G09G2330/06
摘要： A display includes an insulating substrate, a video signal line placed on a main surface of the insulating substrate and including first and second ends, pixels connected to the video signal line, a video signal line driver to which the first end is connected, an inspection signal line placed near the second end and including third and fourth ends, the third end being located at an edge of the main surface, and an analog switch connected between the second and fourth ends.
摘要翻译： 显示器包括绝缘基板，放置在绝缘基板的主表面上的视频信号线，并且包括第一和第二端，连接到视频信号线的像素，连接第一端的视频信号线驱动器，检查 信号线放置在第二端附近并且包括第三和第四端，第三端位于主表面的边缘，以及模拟开关，连接在第二端和第四端之间。
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公开(公告)号：US20050007307A1
公开(公告)日：2005-01-13
申请号：US10846550
申请日：2004-05-17
申请人： Yoshiro Aoki
发明人： Yoshiro Aoki
CPC分类号： G09G3/3233 , G09G3/325 , G09G3/3266 , G09G2300/0417 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0251 , G09G2310/0262 , G09G2320/0223 , G09G2320/043
摘要： Buffer circuits are provided between outputs of a scanning line driver circuit and scanning lines. The buffer circuits each are configured to make rise or fall time of scanning signals at output sides of the buffer circuits substantially the same as or longer than those of the scanning signals at end terminals of the scanning lines when the scanning signals supplied to the scanning lines are rectangular in waveform.
摘要翻译： 在扫描线驱动电路的输出和扫描线之间提供缓冲电路。 各个缓冲电路被配置为当提供给扫描线的扫描信号时，缓冲电路的输出侧的扫描信号的上升或下降时间基本上等于或长于扫描线的端部的扫描信号的扫描信号的上升或下降时间 是波形的矩形。
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