公开(公告)号：US20080055292A1

公开(公告)日：2008-03-06

申请号：US11845285

申请日：2007-08-27

申请人： Hee-Wook DO ,  Byoung-Sun NA ,  Seung-Hoo YOO ,  Soon-Il AHN ,  Hyun-Cheol MOON ,  Hye-Ran YOU

发明人： Hee-Wook DO ,  Byoung-Sun NA ,  Seung-Hoo YOO ,  Soon-Il AHN ,  Hyun-Cheol MOON ,  Hye-Ran YOU

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G02F1/133707 ,  G02F1/13624 ,  G02F2001/134318 ,  G02F2001/134345 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0876

摘要： In a display panel, main and sub pixel electrodes are connected to first and second drain electrodes of a thin film transistor, respectively, to receive a data voltage during a 1 H period as main and sub pixel voltages. A main storage electrode overlaps the main pixel electrode to receive a first common voltage that varies with the gate pulse and the polarity of the data voltage. A sub storage electrode overlaps the sub pixel electrode to receive a second common voltage that is uniformly maintained at a constant voltage level. The sub pixel voltage is uniformly maintained by the second common voltage, but the main pixel voltage is shifted up or down by the first common voltage. Thus, the main pixel voltage may have a voltage level higher than that of the sub pixel voltage.

摘要翻译： 在显示面板中，主像素电极和子像素电极分别连接到薄膜晶体管的第一和第二漏电极，以在1H周期内接收数据电压作为主像素电压和子像素电压。 主存储电极与主像素电极重叠以接收随着栅极脉冲和数据电压的极性而变化的第一公共电压。 子存储电极与子像素电极重叠以接收均匀地保持在恒定电压电平的第二公共电压。 子像素电压由第二公共电压均匀地维持，但主像素电压被上下移动第一公共电压。 因此，主像素电压可以具有比子像素电压的电压电平更高的电压电平。

公开(公告)号：US20100007653A1

公开(公告)日：2010-01-14

申请号：US12333561

申请日：2008-12-12

申请人： Soon-Il AHN ,  Ho-Kyoon KWON ,  Byoung-Sun NA ,  Dong-Hyon KI ,  Seung-Soo BAEK ,  Hye-Seok NA

发明人： Soon-Il AHN ,  Ho-Kyoon KWON ,  Byoung-Sun NA ,  Dong-Hyon KI ,  Seung-Soo BAEK ,  Hye-Seok NA

IPC分类号： G09G3/36 ,  G06F3/038

CPC分类号： G09G3/3677 ,  G09G2330/08 ,  G11C19/184 ,  G11C19/28

摘要： A gate driver that comprises n shift registers, wherein n is an integer equal to or larger than 1, each of the n shift registers includes; a start stage which outputs a gate signal and starts its operation in response to a start signal, and a plurality of subsequent stages which are connected to each other in sequence, and which sequentially output a plurality of gate signals in response to a signal output from the start stage, wherein at least one stage of the plurality of subsequent stages is reset by the start signal.

摘要翻译： 一种包括n个移位寄存器的栅极驱动器，其中n是等于或大于1的整数，n个移位寄存器中的每一个包括： 开始阶段，其响应于起始信号输出门信号并开始其操作;以及多个后续级，它们依次相互连接，并且响应于从...输出的信号顺序地输出多个门信号 起始阶段，其中多个后续级中的至少一级由起始信号复位。

公开(公告)号：US20080100560A1

公开(公告)日：2008-05-01

申请号：US11928466

申请日：2007-10-30

申请人： Byoung-Sun NA ,  Dong-Hyeon KI ,  Min-Cheol LEE ,  Soon-Il AHN

发明人： Byoung-Sun NA ,  Dong-Hyeon KI ,  Min-Cheol LEE ,  Soon-Il AHN

IPC分类号： G09G3/36

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2320/0219 ,  G09G2320/041

摘要： In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.

摘要翻译： 在具有栅极驱动电路的栅极驱动电路和显示装置中，将多个相互依次连接并依次输出栅极信号的多级中的当前级的上拉晶体管拉起当前的栅极信号 通过输出端子输出到栅极导通电压。 缓冲晶体管连接到上拉晶体管的控制端，以接收来自前一级的先前输出信号并接通上拉晶体管。 缓冲晶体管具有的电荷率约为上拉晶体管的充电能力的两倍或更大。 因此，可以减小上拉晶体管的尺寸，从而当栅极驱动电路在高温或低温条件下工作时，防止栅极驱动电路的故障。

公开(公告)号：US20090184946A1

公开(公告)日：2009-07-23

申请号：US12275338

申请日：2008-11-21

申请人： Soon-Il AHN ,  Seung-Soo BAEK ,  Seong-Young LEE ,  Kee-Bum PARK

发明人： Soon-Il AHN ,  Seung-Soo BAEK ,  Seong-Young LEE ,  Kee-Bum PARK

IPC分类号： G09G5/00

CPC分类号： G09G3/3225 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/1345 ,  G02F1/13454 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/123 ,  G09G3/20 ,  G09G3/3648 ,  G09G2300/04 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0223 ,  Y10T29/49155

摘要： A display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines are disposed at a position outside a region of overlap of the conductive member. Accordingly, the capacitances between the signal lines may be substantially the same.

摘要翻译： 根据本发明的显示装置包括第一基板，形成在第一基板上的驱动部分，形成在第一基板上以将信号传输到驱动部分的多个信号线，面向第一基板的第二基板，以及 形成在所述第二基板上的导电构件，其中所述驱动部分与所述导电构件重叠，并且所述信号线设置在所述导电构件的重叠区域外侧的位置。 因此，信号线之间的电容可以是基本上相同的。

公开(公告)号：US20100045884A1

公开(公告)日：2010-02-25

申请号：US12537143

申请日：2009-08-06

申请人： Soon-Il AHN ,  Dong-Gyu KIM ,  Hye-Seok NA

发明人： Soon-Il AHN ,  Dong-Gyu KIM ,  Hye-Seok NA

IPC分类号： G09G3/36 ,  G02F1/133

CPC分类号： G02F1/13624 ,  G02F1/133707 ,  G02F2001/134345 ,  G02F2001/13606 ,  G02F2001/13712 ,  G02F2201/40 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0465 ,  G09G2300/0876 ,  G09G2320/0233 ,  G09G2320/028

摘要： A liquid crystal display according to an embodiment includes a gate line extending in a first direction, a data line intersecting the gate line and extending in a second direction, a first switching element connected to the gate line and the data line, a second switching element connected to the gate line and the data line, a first subpixel electrode connected to the first switching element and having a first voltage, and a second subpixel electrode connected to the second switching element and having a second voltage. The difference between the first voltage and a common voltage is larger than the difference between the second voltage and the common voltage, and the shortest distance between the first subpixel electrode and the data line is larger than the shortest distance between the second subpixel electrode and the data line. Accordingly, a variation of luminance due to parasitic capacitance between the pixel electrode and the data line may be reduced, and the aperture ratio may be increased.

摘要翻译： 根据实施例的液晶显示器包括沿第一方向延伸的栅极线，与栅极线相交并沿第二方向延伸的数据线，连接到栅极线和数据线的第一开关元件，第二开关元件 连接到栅极线和数据线，连接到第一开关元件并具有第一电压的第一子像素电极，以及连接到第二开关元件并具有第二电压的第二子像素电极。 第一电压和公共电压之间的差大于第二电压和公共电压之间的差，第一子像素电极和数据线之间的最短距离大于第二子像素电极与第二子像素电极之间的最短距离 数据线。 因此，由于像素电极和数据线之间的寄生电容引起的亮度变化可能降低，并且可以增加开口率。

公开(公告)号：US20100118221A1

公开(公告)日：2010-05-13

申请号：US12435533

申请日：2009-05-05

申请人： Yoon-Jang KIM ,  Yeong-Keun KWON ,  Soon-Il AHN ,  Kyung-Ho PARK

发明人： Yoon-Jang KIM ,  Yeong-Keun KWON ,  Soon-Il AHN ,  Kyung-Ho PARK

IPC分类号： G02F1/1343 ,  G02F1/133

CPC分类号： G02F1/136286 ,  G02F1/13454 ,  G02F1/136213 ,  G02F2201/40

摘要： A liquid crystal display includes a substrate including a longer first side and a shorter second side, a plurality of gate lines disposed on the substrate, a plurality of data lines disposed on the substrate perpendicular to and insulated from the gate lines, and a plurality of pixel electrodes, each pixel electrode electrically connected to a data line by a switching element, wherein a number of the gate lines is about half of a number of the pixel electrodes, and the data lines extend in a direction which is substantially parallel to a direction of the first side.

摘要翻译： 液晶显示器包括：基板，其具有较长的第一侧和较短的第二侧;多个栅极线，设置在基板上;多个数据线，设置在垂直于栅极线并与栅极线绝缘的基板上;多个栅极线， 像素电极，每个像素电极通过开关元件电连接到数据线，其中栅极线的数量是多个像素电极的大约一半，并且数据线在基本上平行于方向的方向上延伸 的第一边。