公开(公告)号：US20120280237A1

公开(公告)日：2012-11-08

申请号：US13221058

申请日：2011-08-30

申请人： Hee-Young KWACK ,  Mun Gi Park

发明人： Hee-Young KWACK ,  Mun Gi Park

IPC分类号： H01L21/336 ,  H01L33/08

CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F2001/134372 ,  G02F2001/136231 ,  H01L27/1288 ,  H01L29/41733

摘要： The present invention relates to a thin film transistor substrate and a method for fabricating the same which can reduce a number of steps. The method for fabricating a thin film transistor substrate includes the steps of a first mask step forming a first conductive pattern on a substrate to include a gate electrode and a gate line, a second mask step depositing a gate insulating film on the substrate having the first conductive pattern formed thereon and forming a second conductive pattern on the gate insulating film to include a semiconductor pattern, source and drain electrodes and data line, a third mask step depositing a first protective film on the substrate having the second conductive pattern formed thereon and forming a pixel contact hole for exposing the drain electrode passed through the first protective film, a fourth mask step forming a third conductive pattern on the first protective films to have a common electrode and a common line and a second protective film to form an undercut with the common electrode and to include a pixel contact hole which exposes the drain electrode on the common electrode, and a fifth mask step forming a fourth conductive pattern to include a pixel electrode spaced from the common electrode by a space provided by the undercut.

摘要翻译： 薄膜晶体管基板及其制造方法技术领域本发明涉及薄膜晶体管基板及其制造方法，可以减少多个步骤。 制造薄膜晶体管基板的方法包括以下步骤：第一掩模步骤，在基板上形成第一导电图案以包括栅电极和栅极线;第二掩模步骤，在具有第一栅极电极的基板上沉积栅极绝缘膜; 形成在其上的导电图案并在栅极绝缘膜上形成第二导电图案以包括半导体图案，源电极和漏电极和数据线;第三掩模步骤，在其上形成有第二导电图案的基板上沉积第一保护膜，并形成 用于使穿过第一保护膜的漏极暴露的像素接触孔，在第一保护膜上形成第三导电图案以具有公共电极和公共线的第四掩模步骤和形成底切的第二保护膜， 并且包括使公共电极上的漏电极露出的像素接触孔，以及fi 第五掩模步骤，形成第四导电图案，以包括由所述底切提供的空间与所述公共电极间隔开的像素电极。

公开(公告)号：US08669557B2

公开(公告)日：2014-03-11

申请号：US13221058

申请日：2011-08-30

申请人： Hee-Young Kwack ,  Mun Gi Park

发明人： Hee-Young Kwack ,  Mun Gi Park

IPC分类号： H01L29/10

CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F2001/134372 ,  G02F2001/136231 ,  H01L27/1288 ,  H01L29/41733

摘要： The present invention relates to a thin film transistor substrate and a method for fabricating the same which can reduce a number of steps. The method for fabricating a thin film transistor substrate includes the steps of a first mask step forming a first conductive pattern on a substrate to include a gate electrode and a gate line, a second mask step depositing a gate insulating film on the substrate having the first conductive pattern formed thereon and forming a second conductive pattern on the gate insulating film to include a semiconductor pattern, source and drain electrodes and data line, a third mask step depositing a first protective film on the substrate having the second conductive pattern formed thereon and forming a pixel contact hole for exposing the drain electrode passed through the first protective film, a fourth mask step forming a third conductive pattern on the first protective films to have a common electrode and a common line and a second protective film to form an undercut with the common electrode and to include a pixel contact hole which exposes the drain electrode on the common electrode, and a fifth mask step forming a fourth conductive pattern to include a pixel electrode spaced from the common electrode by a space provided by the undercut.

摘要翻译： 薄膜晶体管基板及其制造方法技术领域本发明涉及薄膜晶体管基板及其制造方法，可以减少多个步骤。 制造薄膜晶体管基板的方法包括以下步骤：第一掩模步骤，在基板上形成第一导电图案以包括栅电极和栅极线;第二掩模步骤，在具有第一栅极电极的基板上沉积栅极绝缘膜; 形成在其上的导电图案并在栅极绝缘膜上形成第二导电图案以包括半导体图案，源电极和漏电极和数据线;第三掩模步骤，在其上形成有第二导电图案的基板上沉积第一保护膜，并形成 用于使穿过第一保护膜的漏极暴露的像素接触孔，在第一保护膜上形成第三导电图案以具有公共电极和公共线的第四掩模步骤和形成底切的第二保护膜， 并且包括使公共电极上的漏电极露出的像素接触孔，以及fi 第五掩模步骤，形成第四导电图案，以包括由所述底切提供的空间与所述公共电极间隔开的像素电极。

公开(公告)号：US09383481B2

公开(公告)日：2016-07-05

申请号：US13054393

申请日：2009-07-17

申请人： Se Ra Kim ,  Jung Sik Jo ,  Mun Gi Park ,  Kee Young Kim ,  In Cheon Han

发明人： Se Ra Kim ,  Jung Sik Jo ,  Mun Gi Park ,  Kee Young Kim ,  In Cheon Han

IPC分类号： G02B1/10 ,  G02F1/1333 ,  G02F1/1335

CPC分类号： G02B1/16 ,  B32B2457/202 ,  G02B1/10 ,  G02B1/105 ,  G02B1/14 ,  G02F1/1333 ,  G02F1/133528 ,  G02F2202/16 ,  G02F2202/22 ,  G02F2202/28

摘要： The present invention relates to a liquid crystal display comprising a conductive pressure sensitive adhesive layer. The present invention may provide a liquid crystal display which may prevent malfunction of devices by static electricity generated in preparation or use procedures even without using the ITO layer conventionally formed between the upper substrate and a polarizer in a liquid crystal panel for an antistatic purpose, and has excellent physical properties such as endurance reliability under high temperature or high humidity condition and optical characteristics.

摘要翻译： 液晶显示器技术领域本发明涉及一种包含导电压敏粘合剂层的液晶显示器。 本发明可以提供一种液晶显示器，即使不使用用于防静电目的的液晶面板中的上基板和偏振片之间常规形成的ITO层，也可以防止在准备或使用过程中产生的静电中的设备的故障，以及 具有优异的物理性能，例如在高温或高湿条件下的耐久可靠性和光学特性。

公开(公告)号：US20110310333A1

公开(公告)日：2011-12-22

申请号：US13054393

申请日：2009-07-17

申请人： Se Ra Kim ,  Jung Sik Jo ,  Mun Gi Park ,  Kee Young Kim ,  In Cheon Han

发明人： Se Ra Kim ,  Jung Sik Jo ,  Mun Gi Park ,  Kee Young Kim ,  In Cheon Han

IPC分类号： G02F1/1335

CPC分类号： G02B1/16 ,  B32B2457/202 ,  G02B1/10 ,  G02B1/105 ,  G02B1/14 ,  G02F1/1333 ,  G02F1/133528 ,  G02F2202/16 ,  G02F2202/22 ,  G02F2202/28

摘要： The present invention relates to a liquid crystal display comprising a conductive pressure sensitive adhesive layer. The present invention may provide a liquid crystal display which may prevent malfunction of devices by static electricity generated in preparation or use procedures even without using the ITO layer conventionally formed between the upper substrate and a polarizer in a liquid crystal panel for an antistatic purpose, and has excellent physical properties such as endurance reliability under high temperature or high humidity condition and optical characteristics.

摘要翻译： 液晶显示器技术领域本发明涉及一种包含导电压敏粘合剂层的液晶显示器。 本发明可以提供一种液晶显示器，即使不使用用于防静电目的的液晶面板中的上基板和偏振片之间常规形成的ITO层，也可以防止在准备或使用过程中产生的静电中的设备的故障，以及 具有优异的物理性能，例如在高温或高湿条件下的耐久可靠性和光学特性。