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    Digital image recording and/or reproducing apparatus using a plurality of compression methods
    1.
    发明授权
    Digital image recording and/or reproducing apparatus using a plurality of compression methods 失效
    使用多种压缩方法的数字图像记录和/或再现装置

    公开(公告)号：US06192190B1

    公开(公告)日：2001-02-20

    申请号：US08453489

    申请日：1995-05-30

    申请人： Akihiko Tojo ,  Toshihiko Mimura ,  Yoshitaka Murata ,  Nobuaki Date ,  Kan Takaiwa ,  Hideaki Kawamura ,  Hiroyuki Horii ,  Takashi Suzuki ,  Seiichi Ozaki

    发明人： Akihiko Tojo ,  Toshihiko Mimura ,  Yoshitaka Murata ,  Nobuaki Date ,  Kan Takaiwa ,  Hideaki Kawamura ,  Hiroyuki Horii ,  Takashi Suzuki ,  Seiichi Ozaki

    IPC分类号： H04N592

    CPC分类号： H04N9/7921 ,  H04N5/772 ,  H04N9/8042 ,  H04N9/8063

    摘要： A digital image recording and/or reproducing apparatus using a plurality of compression methods may include, in a recording section, (a) data compression circuitry, including a plurality of compression circuits which have different compression methods, for changing a compression rate for input digital image data by changing a combination of the plurality of compression circuits compressing the digital input image data and (b) circuitry for recording (1) the digital image data compressed by the data compressing circuit and (2) data representing the compression rate of the digital image data compressed by the data compressing circuit. The apparatus may include a reproducing section having (a) a reproducing circuit for reproducing from the recording medium the digital image data compressed with the compression rate provided by the combination of different compression methods, (b) detecting circuitry for detecting the data representing the predetermined compression rate stored on the recording medium, and (c) reconstruction circuitry for reconstructing the digital image data reproduced by the reproducing circuitry according to the representing data detected by the detecting circuitry.

    摘要翻译： 使用多种压缩方法的数字图像记录和/或再现装置可以在记录部分中包括（a）数据压缩电路，包括具有不同压缩方法的多个压缩电路，用于改变输入数字的压缩率 通过改变压缩数字输入图像数据的多个压缩电路的组合的图像数据和（b）用于记录的电路（1）由数据压缩电路压缩的数字图像数据和（2）表示数字压缩电路的压缩率的数据 由数据压缩电路压缩的图像数据。 该装置可以包括：再现部分，具有（a）再现电路，用于从记录介质再现以不同压缩方法的组合提供的压缩率压缩的数字图像数据，（b）检测电路，用于检测表示预定 存储在记录介质上的压缩率，以及（c）重建电路，用于根据由检测电路检测到的表示数据来重建由再现电路再现的数字图像数据。

    Image reproducing and storage arrangement with stored image index information
    8.
    发明授权
    Image reproducing and storage arrangement with stored image index information 失效
    具有存储图像索引信息的图像再现和存储布置

    公开(公告)号：US06415097B1

    公开(公告)日：2002-07-02

    申请号：US08366439

    申请日：1994-12-30

    申请人： Masahiro Takei ,  Seiichi Ozaki

    发明人： Masahiro Takei ,  Seiichi Ozaki

    IPC分类号： H04N591

    CPC分类号： G11B27/105 ,  G11B27/11 ,  G11B2220/20 ,  G11B2220/2512 ,  H04N5/781 ,  H04N9/8227

    摘要： An index image is immediately displayed. A recording and reproduction apparatus records images onto a video medium and reproduces the recorded images. A computer checks whether an index image of the video medium loaded in the recording and reproduction apparatus has been recorded on a hard disk or not. When the index image exists, it is displayed on a monitor. When no index image exists, an instruction to form the index image is instructed to the recording and reproduction apparatus and the formed index image is recorded on the hard disk. In this instance, an ID code to specify the medium is stored on the hard disk and is transferred to the recording and reproduction apparatus for the H1 term of a video signal and is also recorded on the medium.

    摘要翻译： 立即显示索引图像。 记录和再现设备将图像记录到视频介质上并再现记录的图像。 计算机检查装载在记录和再现装置中的视频介质的索引图像是否已被记录在硬盘上。 当索引图像存在时，显示在监视器上。 当没有索引图像时，指示形成索引图像的指令到记录和再现装置，并且形成的索引图像被记录在硬盘上。 在这种情况下，用于指定介质的ID代码被存储在硬盘上，并被传送到用于视频信号的H1项的记录和再现设备，并且还被记录在介质上。

    Packet communication processing method
    9.
    发明授权
    Packet communication processing method 失效
    分组通信处理方法

    公开(公告)号：US5168497A

    公开(公告)日：1992-12-01

    申请号：US409620

    申请日：1989-09-19

    申请人： Seiichi Ozaki ,  Michio Asano ,  Yoshihiro Takiyasu

    发明人： Seiichi Ozaki ,  Michio Asano ,  Yoshihiro Takiyasu

    IPC分类号： H04L1/00 ,  H04L29/06 ,  H04L29/08

    CPC分类号： H04L12/56 ,  H04L29/06

    摘要： A packet communication processing method in a communication apparatus which performs communication with end apparatus for performing data link layer processing according to a data link protocol such as HDLC or similar protocol, in which method information frames (I frames) are received regardless of the rightness of a sending sequence number N(S) which is included in a control field (C field) in each of the received information so as to indicate the sequence of the I frames.

    摘要翻译： 一种通信装置中的分组通信处理方法，其与根据诸如HDLC或类似协议的数据链路协议执行数据链路层处理的终端装置进行通信，其中接收方法信息帧（I帧），而不管其是否正确 在每个接收到的信息中包括在控制字段（C字段）中的发送序列号N（S），以指示I帧的序列。

    Information processing system with instruction address saving function corresponding to priority levels of interruption information
    10.
    发明授权
    Information processing system with instruction address saving function corresponding to priority levels of interruption information 失效
    具有指令地址保存功能的信息处理系统对应于中断信息的优先级

    公开(公告)号：US5032980A

    公开(公告)日：1991-07-16

    申请号：US241375

    申请日：1988-09-07

    申请人： Seiichi Ozaki ,  Kenichi Wada ,  Shigeki Morimoto

    发明人： Seiichi Ozaki ,  Kenichi Wada ,  Shigeki Morimoto

    IPC分类号： G06F9/38 ,  G06F9/46 ,  G06F9/48

    CPC分类号： G06F9/4812 ,  G06F9/3861 ,  G06F9/462

    摘要： A level machine information system is provided with an instruction register for storing an address of an instruction read out from an instruction memory, an instruction decoder for producing control signals complying with the instruction read out, a calculator for producing a new address of an instruction to be executed next on the basis of the address outputted from the instruction register, an instruction length code supplied from the decoder as the control signals, a plurality of first registers for saying the address outputted from the instruction register, a plurality of second registers for saving the new address, a controller and a selector for supplying the instruction register with the new address, the saved new address and fixed addresses each indicating the head of interruption programs in the instruction memory. The first and second registers correspond to all but the highest interruption priority level. Upon an acknowledged interruption request, the controller controls the first and second registers and selector to save the new address of the calculator and the old address of the instruction register in one of the first and second registers corresponding to the priority levels of an interrupted process, respectively. One of the fixed addresses corresponding to a process to be executed for the interruption request is transferred in the instruction register. If necessary, the contents of the first and second registers are referenced by the process to detect the reasons for the interruption.

    摘要翻译： 级别机器信息系统设置有用于存储从指令存储器读出的指令的地址的指令寄存器，用于产生符合读出指令的控制信号的指令解码器，用于产生指令的新地址的计算器 基于从指令寄存器输出的地址，从解码器提供的作为控制信号的指令长度代码，用于表示从指令寄存器输出的地址的多个第一寄存器，多个用于保存的第二寄存器 新地址，用于向指令寄存器提供新地址的控制器和选择器，保存的新地址和固定地址，每个指示指令存储器中的中断程序的开头。 第一和第二寄存器对应于除最高中断优先级之外的所有寄存器。 在确认的中断请求之后，控制器控制第一和第二寄存器和选择器以将计算器的新地址和指令寄存器的旧地址保存在与中断处理的优先级相对应的第一和第二寄存器之一中， 分别。 与中断请求执行的处理相对应的固定地址之一被传送到指令寄存器中。 如有必要，第一和第二寄存器的内容由进程引用，以检测中断的原因。