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    CHARGE PUMP SYSTEMS AND METHODS
    2.
    发明申请
    CHARGE PUMP SYSTEMS AND METHODS 有权
    充电泵系统和方法

    公开(公告)号：US20110169558A1

    公开(公告)日：2011-07-14

    申请号：US13070405

    申请日：2011-03-23

    申请人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Nasrin Jaffari ,  Hung Quoc Nguyen ,  Anh Ly

    发明人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Nasrin Jaffari ,  Hung Quoc Nguyen ,  Anh Ly

    IPC分类号： G05F1/10

    CPC分类号： G05F3/02 ,  H02M3/073 ,  H02M2001/322

    摘要： Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry.

    摘要翻译： 数字多电平存储器系统和方法包括用于为各种存储器操作产生调节的高电压的电荷泵。 电荷泵可以包括多个泵级。 示例性系统的方面可以包括在低电压操作条件下执行有序充电和放电的电荷泵。 其他方面可以包括使状态状态泵送的特征，例如避免泵级之间的级联短路的电路。 每个泵级还可以包括排放其节点的电路，例如通过相关联的泵互连通过自放电。 另外的方面还可以包括以下功能：辅助各个泵级的上电，双电压，高电平移位，提供反并联电路配置和/或实现缓冲或预充电特征，例如自缓冲和自缓冲， 预充电电路。

    SENSE AMPLIFIER FOR LOW VOLTAGE HIGH SPEED SENSING
    3.
    发明申请
    SENSE AMPLIFIER FOR LOW VOLTAGE HIGH SPEED SENSING 有权
    用于低电压高速感应的感应放大器

    公开(公告)号：US20110121863A1

    公开(公告)日：2011-05-26

    申请号：US12972974

    申请日：2010-12-20

    申请人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    发明人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    IPC分类号： G11C7/08 ,  H03F3/45 ,  G11C7/06

    CPC分类号： G11C11/5642 ,  G11C7/06 ,  G11C7/062

    摘要： A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input of the comparator is coupled to the low impedance circuit and a reference voltage node. A second input of the comparator is coupled to a data voltage node. The first load circuit loads a reference cell coupled to the reference voltage node. The second load circuit loads a data cell coupled to the data voltage node.

    摘要翻译： 存储器系统包括用于通过与存储在参考单元中的电压进行比较来检测数据存储单元的内容的读出放大器。 读出放大器可以包括比较器，第一和第二负载电路以及低阻抗电路。 比较器的第一输入耦合到低阻抗电路和参考电压节点。 比较器的第二输入耦合到数据电压节点。 第一负载电路加载耦合到参考电压节点的参考电池。 第二负载电路加载耦合到数据电压节点的数据单元。

    SENSE AMPLIFIER FOR LOW VOLTAGE HIGH SPEED SENSING
    4.
    发明申请
    SENSE AMPLIFIER FOR LOW VOLTAGE HIGH SPEED SENSING 有权
    用于低电压高速感应的感应放大器

    公开(公告)号：US20120044774A1

    公开(公告)日：2012-02-23

    申请号：US13286166

    申请日：2011-10-31

    申请人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    发明人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    IPC分类号： G11C7/06 ,  H03F3/45

    CPC分类号： G11C11/5642 ,  G11C7/06 ,  G11C7/062

    摘要： A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input of the comparator is coupled to the low impedance circuit and a reference voltage node. A second input of the comparator is coupled to a data voltage node. The first load circuit loads a reference cell coupled to the reference voltage node. The second load circuit loads a data cell coupled to the data voltage node.

    摘要翻译： 存储器系统包括用于通过与存储在参考单元中的电压进行比较来检测数据存储单元的内容的读出放大器。 读出放大器可以包括比较器，第一和第二负载电路以及低阻抗电路。 比较器的第一输入耦合到低阻抗电路和参考电压节点。 比较器的第二输入耦合到数据电压节点。 第一负载电路加载耦合到参考电压节点的参考电池。 第二负载电路加载耦合到数据电压节点的数据单元。

    Sense amplifier for low voltage high speed sensing
    5.
    发明授权
    Sense amplifier for low voltage high speed sensing 有权
    用于低电压高速感应的感应放大器

    公开(公告)号：US07855583B2

    公开(公告)日：2010-12-21

    申请号：US12493240

    申请日：2009-06-28

    申请人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    发明人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    IPC分类号： G01R19/00

    CPC分类号： G11C11/5642 ,  G11C7/06 ,  G11C7/062

    摘要： A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input of the comparator is coupled to the low impedance circuit and a reference voltage node. A second input of the comparator is coupled to a data voltage node. The first load circuit loads a reference cell coupled to the reference voltage node. The second load circuit loads a data cell coupled to the data voltage node.

    摘要翻译： 存储器系统包括用于通过与存储在参考单元中的电压进行比较来检测数据存储单元的内容的读出放大器。 读出放大器可以包括比较器，第一和第二负载电路以及低阻抗电路。 比较器的第一输入耦合到低阻抗电路和参考电压节点。 比较器的第二输入耦合到数据电压节点。 第一负载电路加载耦合到参考电压节点的参考电池。 第二负载电路加载耦合到数据电压节点的数据单元。

    Sense amplifier for low voltage high speed sensing
    9.
    发明授权
    Sense amplifier for low voltage high speed sensing 有权
    用于低电压高速感应的感应放大器

    公开(公告)号：US07345512B2

    公开(公告)日：2008-03-18

    申请号：US10838999

    申请日：2004-05-04

    申请人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    发明人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Hung Quoc Nguyen

    IPC分类号： G01R19/00

    CPC分类号： G11C11/5642 ,  G11C7/06 ,  G11C7/062

    摘要： A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input of the comparator is coupled to the low impedance circuit and a reference voltage node. A second input of the comparator is coupled to a data voltage node. The first load circuit loads a reference cell coupled to the reference voltage node. The second load circuit loads a data cell coupled to the data voltage node.

    摘要翻译： 存储器系统包括用于通过与存储在参考单元中的电压进行比较来检测数据存储单元的内容的读出放大器。 读出放大器可以包括比较器，第一和第二负载电路以及低阻抗电路。 比较器的第一输入耦合到低阻抗电路和参考电压节点。 比较器的第二输入耦合到数据电压节点。 第一负载电路加载耦合到参考电压节点的参考电池。 第二负载电路加载耦合到数据电压节点的数据单元。

    Charge pump systems and methods
    10.
    发明授权
    Charge pump systems and methods 有权

    公开(公告)号：US08339187B2

    公开(公告)日：2012-12-25

    申请号：US13070405

    申请日：2011-03-23

    申请人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Nasrin Jaffari ,  Hung Quoc Nguyen ,  Anh Ly

    发明人： Hieu Van Tran ,  Sang Thanh Nguyen ,  Nasrin Jaffari ,  Hung Quoc Nguyen ,  Anh Ly

    IPC分类号： H02M3/18 ,  G05F3/20

    CPC分类号： G05F3/02 ,  H02M3/073 ,  H02M2001/322

    摘要： Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry.