公开(公告)号：US5113151A

公开(公告)日：1992-05-12

申请号：US554375

申请日：1990-07-19

申请人： Takuji Yamamoto ,  Hiroshi Hamano ,  Izumi Amemiya ,  Yasunari Arai ,  Takeshi Ihara

发明人： Takuji Yamamoto ,  Hiroshi Hamano ,  Izumi Amemiya ,  Yasunari Arai ,  Takeshi Ihara

IPC分类号： H03G3/20 ,  H03G5/16 ,  H04B10/69

CPC分类号： H03G3/3084 ,  H03G5/165 ,  H04B10/6931

摘要： Disclosed is an equalizing and amplifying circuit in an optical signal receiving apparatus comprising a preamplifier circuit having an input terminal connected to the output of a light receiving element. The preamplifier circuit amplifies the electrical signal from the light receiving element and outputs an amplified signal. An automatic gain control circuit is connected to the output of the preamplifier circuit. The preamplifier circuit comprises a transistor having a common-base, a current source connected to the emitter of the transistor for supplying a bias current to the transistor, and a load resistor connected to the collector of the transistor. The emitter of the transistor is connected to the input terminal, and the collector of the transistor is connected to the output terminal. A negative influence caused by mounting the circuit on a package is avoided and the circuit operates stably in a high frequency range.

公开(公告)号：US5066877A

公开(公告)日：1991-11-19

申请号：US662502

申请日：1991-02-28

申请人： Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Yasunari Arai ,  Takeshi Ihara

发明人： Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Yasunari Arai ,  Takeshi Ihara

IPC分类号： H03K5/00 ,  H03K5/13

CPC分类号： H03K5/13 ,  H03K5/133 ,  H03K2005/00156 ,  H03K2005/00176 ,  H03K2005/00182

摘要： A data delay circuit includes a first transistor, and a second transistor having a base, an emitter and a collector. Input data is applied to the bases of the first and second transistors. A constant-current source is coupled between the emitters of the first and second transistors and a negative power source. A capacitor is connected between the collector of the first transistor and the collector of the second transistor. The data delay circuit further includes a third transistor and a fourth transistor. The emitters of the third and fourth transistors are connected to the collectors of the first and second transistors, respectively. The bases of the third and fourth transistors are provided with control data having a polarity opposite to that of the input data and having an adjusted amplitude level corresponding to a desired delay time to be given the input data. First and second load resistors are respectively coupled to the collectors of the third and fourth transistors through a positive power source. Delayed input data is drawn from the collectors of the third and fourth transistors.

摘要翻译： 数据延迟电路包括第一晶体管和具有基极，发射极和集电极的第二晶体管。 输入数据被施加到第一和第二晶体管的基极。 恒流源耦合在第一和第二晶体管的发射极和负电源之间。 电容器连接在第一晶体管的集电极和第二晶体管的集电极之间。 数据延迟电路还包括第三晶体管和第四晶体管。 第三和第四晶体管的发射极分别连接到第一和第二晶体管的集电极。 第三和第四晶体管的基极设置有与输入数据的极性相反的极性的控制数据，并且具有对应于要给予输入数据的所需延迟时间的调整幅度电平。 第一和第二负载电阻器通过正电源分别耦合到第三和第四晶体管的集电极。 来自第三和第四晶体管的集电极的延迟输入数据。

公开(公告)号：US5206986A

公开(公告)日：1993-05-04

申请号：US902884

申请日：1992-06-23

申请人： Yasunari Arai ,  Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Takeshi Ihara

发明人： Yasunari Arai ,  Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Takeshi Ihara

IPC分类号： G02B6/42

CPC分类号： G02B6/4214 ,  G02B6/42 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  Y10T29/49126 ,  Y10T29/49144

摘要： An electronic circuit package which includes first and second conductive metal members and a circuit board held between the first and second metal members and having a cutout in which an electronic circuit part is accommodated and a process of producing such electronic circuit package are disclosed. With the electronic circuit package, deterioration of a high speed characteristic of an electronic circuit part accommodated in the package is minimized, and accordingly, when the electronic circuit package is applied to an IC for very high speed optical communications for use with an optical repeater or the like, a very high speed system can be realized. By assembling the components in accordance with a predetermined order, facility in process of production and improvement in reliability of products are attained.

摘要翻译： 一种电子电路封装，其包括第一和第二导电金属构件以及保持在第一和第二金属构件之间的电路板，并且具有容纳电子电路部件的切口和制造这种电子电路封装件的工艺。 利用电子电路封装，容纳在封装中的电子电路部件的高速特性的劣化被最小化，因此当将电子电路封装件应用于用于与光中继器一起使用的非常高速光通信的IC时 可以实现非常高速的系统。 通过根据预定的顺序组装部件，可以实现生产过程中的设备和产品的可靠性的提高。

公开(公告)号：US5150280A

公开(公告)日：1992-09-22

申请号：US564345

申请日：1990-08-08

申请人： Yasunari Arai ,  Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Takeshi Ihara

发明人： Yasunari Arai ,  Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Takeshi Ihara

IPC分类号： G02B6/42

CPC分类号： G02B6/42 ,  G02B6/4214 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/01322

摘要： An electronic circuit package which includes first and second conductive metal members and a circuit board held between the first and second metal members and having a cutout in which an electronic circuit part is accommodated and a process of producing such electronic circuit package are disclosed. With the electronic circuit package, deterioration of a high speed characteristic of an electronic circuit part accommodated in the package is minimized, and accordingly, when the electronic circuit package is applied to an IC for very high speed optical communications for use with an optical repeater or the like, a very high speed system can be realized. By assembling the components in accordance with a predetermined order, facility in process of production and improvement in reliability of products are attained.

摘要翻译： 一种电子电路封装，其包括第一和第二导电金属构件以及保持在第一和第二金属构件之间的电路板，并且具有容纳电子电路部件的切口和制造这种电子电路封装件的工艺。 利用电子电路封装，容纳在封装中的电子电路部件的高速特性的劣化被最小化，因此当将电子电路封装件应用于用于与光中继器一起使用的非常高速光通信的IC时 可以实现非常高速的系统。 通过根据预定的顺序组装部件，可以实现生产过程中的设备和产品的可靠性的提高。

公开(公告)号：US5510745A

公开(公告)日：1996-04-23

申请号：US170997

申请日：1993-12-21

申请人： Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Hiroo Kitasagami ,  Takeshi Ihara

发明人： Hiroshi Hamano ,  Izumi Amemiya ,  Takuji Yamamoto ,  Hiroo Kitasagami ,  Takeshi Ihara

IPC分类号： H03F1/22 ,  H03F3/45 ,  H03K5/15 ,  H03K19/018 ,  H03K19/082

CPC分类号： H03K19/01806 ,  H03F1/22 ,  H03F3/45089 ,  H03K19/01825 ,  H03K5/15

摘要： A high speed electronic circuit has a cascode circuit configuration and is provided with a bias current source (CS.sub.0) between an emitter and a base of a load transistor (Q) in the cascode circuit configuration for compensating a base-emitter voltage (V.sub.BE) of the transistor to eliminate an adverse effect of charging and discharging at a stray capacitor (C) which can be connected between the base and the emitter of the transistor. The high speed electronic circuit can be applied to an; circuit, a level shift circuit, a level shift discrimination circuit, a signal distribution circuit, a signal synthesization circuit and a frequency band control circuit.

摘要翻译： 高速电子电路具有共源共栅电路结构，并且在共源共栅电路配置中在负载晶体管（Q）的发射极和基极之间提供偏置电流源（CS0），用于补偿基极 - 发射极电压（VBE） 该晶体管消除了可以连接在晶体管的基极和发射极之间的杂散电容器（C）的充电和放电的不利影响。 高速电子电路可应用于; 电平，电平移位电路，电平移位鉴别电路，信号分配电路，信号合成电路和频带控制电路。

公开(公告)号：US5506542A

公开(公告)日：1996-04-09

申请号：US152838

申请日：1993-11-12

申请人： Hiroshi Hamano ,  Izumi Amemiya ,  Yoichi Oikawa ,  Takuji Yamamoto ,  Takeshi Ihara ,  Yoshinori Nishizawa

发明人： Hiroshi Hamano ,  Izumi Amemiya ,  Yoichi Oikawa ,  Takuji Yamamoto ,  Takeshi Ihara ,  Yoshinori Nishizawa

IPC分类号： H03H11/04 ,  H03H11/12 ,  H03K5/01

CPC分类号： H03H11/1213

摘要： A filter circuit and a filter integrated circuit capable of being used in a high frequency band includes a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.

摘要翻译： 能够在高频带中使用的滤波器电路和滤波器集成电路包括连接在公共基极晶体管TR1的输​​入信号源和发射极之间的第一电阻器R1，连接在所述输入信号源和 参考电压点，连接在所述输入信号源和共基极晶体管TR1的集电极之间的第二电容器C2，以及连接在共基极晶体管的集电极和参考电压点之间的第二电阻器R2。 因此，可以构成在高频带下工作的低通滤波器，抑制特性参数对滤波器特性的影响。

公开(公告)号：US5293087A

公开(公告)日：1994-03-08

申请号：US963574

申请日：1992-10-19

申请人： Hiroshi Hamano ,  Izumi Amemiya ,  Yoichi Oikawa ,  Takuji Yamamoto ,  Takeshi Ihara ,  Yoshinori Nishizawa

发明人： Hiroshi Hamano ,  Izumi Amemiya ,  Yoichi Oikawa ,  Takuji Yamamoto ,  Takeshi Ihara ,  Yoshinori Nishizawa

IPC分类号： H03H11/04 ,  H03H11/12 ,  H03K5/01

CPC分类号： H03H11/1213

摘要： A filter circuit and a filter integrated circuit capable of being used in a high frequency band comprises a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.

摘要翻译： 能够在高频带中使用的滤波器电路和滤波器集成电路包括连接在公共基极晶体管TR1的输​​入信号源和发射极之间的第一电阻器R1，连接在所述输入信号源和 参考电压点，连接在所述输入信号源和共基极晶体管TR1的集电极之间的第二电容器C2，以及连接在共基极晶体管的集电极和参考电压点之间的第二电阻器R2。 因此，可以构成在高频带下工作的低通滤波器，抑制特性参数对滤波器特性的影响。

公开(公告)号：US5074631A

公开(公告)日：1991-12-24

申请号：US492129

申请日：1990-03-13

申请人： Hiroshi Hamano ,  Izumi Amemiya ,  Hiroshi Nishimoto ,  Takefumi Namiki ,  Izumi Yokota ,  Tadashi Okiyama ,  Minoru Seino

发明人： Hiroshi Hamano ,  Izumi Amemiya ,  Hiroshi Nishimoto ,  Takefumi Namiki ,  Izumi Yokota ,  Tadashi Okiyama ,  Minoru Seino

IPC分类号： G02F1/03 ,  G02F1/225 ,  G02F1/313 ,  H04B10/2507

CPC分类号： G02F1/0327 ,  G02F1/225 ,  G02F1/3136 ,  H04B10/2507 ,  G02F2201/127

摘要： A Mach-Zehnder interferometer type modulator, constructed of first and second optical waveguides, first and second electrodes cooperating with the same, and a driving voltage source, wherein a driving voltage source is constructed of first and second driving units which drive independently the first and second electrodes in accordance with a data input and wherein the first and second driving units apply first and second driving voltages, individually determined, to the first and second electrodes.

公开(公告)号：US5649459A

公开(公告)日：1997-07-22

申请号：US528496

申请日：1995-09-14

申请人： Kazutoshi Murakami ,  Izumi Amemiya

发明人： Kazutoshi Murakami ,  Izumi Amemiya

IPC分类号： B60K17/342 ,  B60K17/344 ,  B60K23/08 ,  B60K17/348

CPC分类号： B60K17/344 ,  B60K17/342 ,  B60K23/0808 ,  Y10T74/19102

摘要： A power transfer system which distributes a power of the engine to front and rear wheels in a vehicle. The power transfer system comprises a first input shaft whose one end portion is in butt connection with an input shaft from an engine and whose other end portion is supported to a ball bearing fixed to a housing. A friction clutch is installed to the first input shaft such that the power to the first output shaft is transferred to a second output shaft through an endless chain according to the engagement of the friction clutch. A ring groove is formed at an outer peripheral portion of the first output shaft, and a ring member is installed to the ring groove so as to be in contact with a side surface of the ball bearing. Therefore, a thrust load applied to the first output shaft due to the operation of the friction clutch is securely received by the ball bearing through the ring member.

摘要翻译： 一种将发动机的动力分配到车辆中的前轮和后轮的动力传递系统。 动力传递系统包括第一输入轴，其一端部与来自发动机的输入轴对接，并且另一端部被支撑到固定到壳体的球轴承。 摩擦离合器被安装到第一输入轴上，使得根据摩擦离合器的接合，通过环形链将第一输出轴的动力传递到第二输出轴。 环形槽形成在第一输出轴的外周部，并且环形构件安装到环形槽中，以便与滚珠轴承的侧表面接触。 因此，通过摩擦离合器的操作施加到第一输出轴的推力负载被球轴承通过环构件牢固地接收。

公开(公告)号：US5699871A

公开(公告)日：1997-12-23

申请号：US527695

申请日：1995-09-13

申请人： Tomoyuki Hara ,  Kenichi Tobita ,  Tsutomu Niimi ,  Izumi Amemiya ,  Toshiharu Takasaki

发明人： Tomoyuki Hara ,  Kenichi Tobita ,  Tsutomu Niimi ,  Izumi Amemiya ,  Toshiharu Takasaki

IPC分类号： B60K17/348 ,  B60K23/08 ,  F16D11/14 ,  F16D48/12

CPC分类号： F16D11/14 ,  B60K17/348 ,  B60K23/0808 ,  F16D2011/008 ,  F16H2061/0474

摘要： In a driving force transfer apparatus for a part-time four-wheel driving vechicle, a dog clutch structure is provided at both sides of first and second output axles, the first output axle being connected toward driven road wheels such as rear road wheels and the second output axle being connected toward non-driven road wheels such as front wheels. The dog clutch structure serves to connect the first output axle to the second output axle so that the four road wheels are forced into a four-wheel drive state during a low-speed gear range position switched through a sub transmission mechanism lever. In a first embodiment, a play in each tooth space structure constituting the dog clutch structure is provided so as to make a smooth mesh of the clutch structure, thus an operating force applied to a lever of the sub transmission mechanism can be lowered.

摘要翻译： 在用于兼职四轮驱动装置的驱动力传递装置中，在第一和第二输出轴的两侧设置有爪形离合器结构，第一输出轴连接到诸如后轮的驱动的车轮，并且 第二输出轴连接到诸如前轮的非驱动的车轮。 狗离合器结构用于将第一输出轴连接到第二输出轴，使得在通过副传动机构杠杆切换的低速档位置期间，四个车轮被迫进入四轮驱动状态。 在第一实施例中，构成狗爪式离合器结构的每个齿空间结构中的游隙被设置成使离合器结构平滑地啮合，从而可以降低施加到副传动机构的杆的作用力。