公开(公告)号：US20090057739A1

公开(公告)日：2009-03-05

申请号：US12230448

申请日：2008-08-28

申请人： Hiroshi Iwai ,  Takeo Hattori ,  Kazuo Tsutsui ,  Kuniyuki Kakushima ,  Parhat Ahmet ,  Jaeyeol Song ,  Masaki Yoshimaru ,  Yasuyoshi Mishima ,  Tomonori Aoyama ,  Hiroshi Oji ,  Yoshitake Kato

发明人： Hiroshi Iwai ,  Takeo Hattori ,  Kazuo Tsutsui ,  Kuniyuki Kakushima ,  Parhat Ahmet ,  Jaeyeol Song ,  Masaki Yoshimaru ,  Yasuyoshi Mishima ,  Tomonori Aoyama ,  Hiroshi Oji ,  Yoshitake Kato

IPC分类号： H01L29/78 ,  H01L21/3205

CPC分类号： H01L29/517 ,  C23C14/021 ,  C23C14/024 ,  C23C14/08 ,  C23C14/18 ,  C23C14/30 ,  H01L21/28158 ,  H01L21/28255 ,  H01L21/31604 ,  H01L29/78

摘要： The Ge channel device comprises: a Ge channel layer (2); a Si-containing interface layer (4) formed on the Ge channel layer (2); a La2O3 layer (6) formed on the interface layer (4); and an electrically conductive layer (8) formed on the La2O3 layer (6). In this device, the Si-containing interface layer (4) functions to suppress the diffusion of Ge atoms into the La2O3 layer (6) and thereby prevents the formation of Ge oxide in the La2O3 layer (6); accordingly, a Ge channel device whose C-V characteristic exhibits only a small hysteresis can be achieved.

摘要翻译： Ge沟道器件包括：Ge沟道层（2）; 形成在所述Ge沟道层（2）上的含Si界面层（4）; 在所述界面层（4）上形成的La 2 O 3层（6）; 和形成在La 2 O 3层（6）上的导电层（8）。 在该器件中，含Si界面层（4）用于抑制Ge原子扩散到La2O3层（6）中，从而防止La2O3层（6）中Ge氧化物的形成; 因此，可以实现其C-V特性仅具有小滞后的Ge通道器件。

公开(公告)号：US07800181B2

公开(公告)日：2010-09-21

申请号：US11582556

申请日：2006-10-18

申请人： Yasutoshi Okuno ,  Michikazu Matsumoto ,  Masafumi Kubota ,  Seiji Ueda ,  Hiroshi Iwai ,  Kazuo Tsutsui ,  Kuniyuki Kakushima

发明人： Yasutoshi Okuno ,  Michikazu Matsumoto ,  Masafumi Kubota ,  Seiji Ueda ,  Hiroshi Iwai ,  Kazuo Tsutsui ,  Kuniyuki Kakushima

IPC分类号： H01L29/78

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A gate electrode is formed on a semiconductor substrate containing silicon, then source/drain regions are formed in regions of the semiconductor substrate located to both sides of the gate electrode, and then a nickel alloy silicide layer is formed on at least either the gate electrode or the source/drain regions. In the step of forming the nickel alloy silicide layer, a nickel alloy film and a nickel film are sequentially deposited on the semiconductor substrate and thereafter subjected to heat treatment.

摘要翻译： 在包含硅的半导体衬底上形成栅电极，然后在位于栅电极两侧的半导体衬底的区域中形成源极/漏极区，然后在栅极上至少形成一个镍合金硅化物层 或源极/漏极区域。 在形成镍合金硅化物层的步骤中，在半导体衬底上依次沉积镍合金膜和镍膜，然后进行热处理。

公开(公告)号：US20070093047A1

公开(公告)日：2007-04-26

申请号：US11582556

申请日：2006-10-18

申请人： Yasutoshi Okuno ,  Michikazu Matsumoto ,  Masafumi Kubota ,  Seiji Ueda ,  Hiroshi Iwai ,  Kazuo Tsutsui ,  Kuniyuki Kakushima

发明人： Yasutoshi Okuno ,  Michikazu Matsumoto ,  Masafumi Kubota ,  Seiji Ueda ,  Hiroshi Iwai ,  Kazuo Tsutsui ,  Kuniyuki Kakushima

IPC分类号： H01L21/4763 ,  H01L21/44 ,  H01L21/3205

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A gate electrode is formed on a semiconductor substrate containing silicon, then source/drain regions are formed in regions of the semiconductor substrate located to both sides of the gate electrode, and then a nickel alloy silicide layer is formed on at least either the gate electrode or the source/drain regions. In the step of forming the nickel alloy silicide layer, a nickel alloy film and a nickel film are sequentially deposited on the semiconductor substrate and thereafter subjected to heat treatment.

摘要翻译： 在包含硅的半导体衬底上形成栅电极，然后在位于栅电极两侧的半导体衬底的区域中形成源极/漏极区，然后在栅极上至少形成一个镍合金硅化物层 或源极/漏极区域。 在形成镍合金硅化物层的步骤中，在半导体衬底上依次沉积镍合金膜和镍膜，然后进行热处理。

公开(公告)号：US07825755B2

公开(公告)日：2010-11-02

申请号：US11577965

申请日：2005-04-07

申请人： Hiroshi Toshiyoshi ,  Hiroyuki Fujita ,  Yuko Yamauchi ,  Akio Higo ,  Kuniyuki Kakushima

发明人： Hiroshi Toshiyoshi ,  Hiroyuki Fujita ,  Yuko Yamauchi ,  Akio Higo ,  Kuniyuki Kakushima

IPC分类号： H01H51/22

CPC分类号： G09G3/346 ,  G02B26/0841 ,  G09G3/2085 ,  G09G2300/088 ,  G09G2360/142

摘要： A semiconductor substrate; a cantilever which is formed on the semiconductor substrate so as to face the semiconductor substrate with an air layer therebetween, the cantilever being made from an electrically conductive material or a semiconductor material, and the cantilever being mechanically movable; a photodiode which is formed so as to be connected in parallel to a capacitance that is constituted from the cantilever and the semiconductor substrate, and the photodiode being formed between an anchor portion which is a portion of the cantilever and the semiconductor substrate; and a power source which supplies voltage via a resistance on a side of the cantilever which is a connection point of a parallel circuit including both the capacitance and the photodiode so as to be backward bias to the photodiode, are included.

摘要翻译： 半导体衬底; 悬臂，其形成在半导体基板上，以便在半导体基板之间具有空气层，所述悬臂由导电材料或半导体材料制成，所述悬臂可机械移动; 形成为与由悬臂和半导体衬底构成的电容并联连接的光电二极管，并且所述光电二极管形成在作为所述悬臂的一部分的锚固部与所述半导体衬底之间; 以及电源，其通过作为包括电容和光电二极管的并联电路的连接点的悬臂的一侧的电阻提供电压，以便向光电二极管反向偏置。

公开(公告)号：US20090102006A1

公开(公告)日：2009-04-23

申请号：US11577965

申请日：2005-04-07

申请人： Hiroshi Toshiyoshi ,  Hiroyuki Fujita ,  Yuko Yamauchi ,  Akio Higo ,  Kuniyuki Kakushima

发明人： Hiroshi Toshiyoshi ,  Hiroyuki Fujita ,  Yuko Yamauchi ,  Akio Higo ,  Kuniyuki Kakushima

IPC分类号： H01L31/08 ,  G05F1/10

CPC分类号： G09G3/346 ,  G02B26/0841 ,  G09G3/2085 ,  G09G2300/088 ,  G09G2360/142

摘要： A semiconductor substrate; a cantilever which is formed on the semiconductor substrate so as to face the semiconductor substrate with an air layer therebetween, the cantilever being made from an electrically conductive material or a semiconductor material, and the cantilever being mechanically movable; a photodiode which is formed so as to be connected in parallel to a capacitance that is constituted from the cantilever and the semiconductor substrate, and the photodiode being formed between an anchor portion which is a portion of the cantilever and the semiconductor substrate; and a power source which supplies voltage via a resistance on a side of the cantilever which is a connection point of a parallel circuit including both the capacitance and the photodiode so as to be backward bias to the photodiode, are included.

摘要翻译： 半导体衬底; 悬臂，其形成在半导体基板上，以便在半导体基板之间具有空气层，所述悬臂由导电材料或半导体材料制成，所述悬臂可机械移动; 形成为与由悬臂和半导体衬底构成的电容并联连接的光电二极管，并且所述光电二极管形成在作为所述悬臂的一部分的锚固部与所述半导体衬底之间; 以及电源，其通过作为包括电容和光电二极管的并联电路的连接点的悬臂的一侧的电阻提供电压，以便向光电二极管反向偏置。