公开(公告)号：US4988423A

公开(公告)日：1991-01-29

申请号：US430950

申请日：1989-11-03

申请人： Hiroshi Yamamoto ,  Tsutomu Fujita ,  Takao Kakiuchi ,  Kousaku Yano ,  Shuichi Tanimura ,  Shinji Fujii

发明人： Hiroshi Yamamoto ,  Tsutomu Fujita ,  Takao Kakiuchi ,  Kousaku Yano ,  Shuichi Tanimura ,  Shinji Fujii

IPC分类号： H01L21/768

CPC分类号： H01L21/76886 ,  H01L21/76877 ,  Y10S438/958

摘要： Disclosed is a method for fabricating an interconnection structure comprising a step of depositing an Al or Al alloy film on a dielectric film by a sputtering method improved in step coverage, a step of processing said Al or Al alloy film or a layered metal film thereof with another metal film into a metal line, and a step of depositing a film of high melting point metal or alloy thereof on the top and side surfaces of said line.

摘要翻译： 公开了一种制造互连结构的方法，其包括通过步骤覆盖改进的溅射方法在电介质膜上沉积Al或Al合金膜的步骤，将Al或Al合金膜或其层状金属膜加工的步骤 将另一金属膜转变为金属线，以及在所述线的顶表面和侧表面上沉积高熔点金属或其合金的膜的步骤。

公开(公告)号：US5084413A

公开(公告)日：1992-01-28

申请号：US532170

申请日：1990-05-29

申请人： Tsutomu Fujita ,  Takao Kakiuchi ,  Hiroshi Yamamoto ,  Shoichi Tanimura

发明人： Tsutomu Fujita ,  Takao Kakiuchi ,  Hiroshi Yamamoto ,  Shoichi Tanimura

IPC分类号： H01L21/285 ,  H01L21/768

CPC分类号： H01L21/76879 ,  H01L21/28512

摘要： A method for filling a contact hole in which (i) a silicon dioxide layer is formed on a silicon substrate; (ii) a contact hole is formed in the silicon dioxide layer; (iii) polysilicon film is formed on the side and bottom surface portions of the contact hole; (iv) gas containing tungsten reacts with the film; and (v) the contact hole is filled up with tungsten.

摘要翻译： 一种用于填充接触孔的方法，其中（i）二氧化硅层形成在硅衬底上; （ii）在二氧化硅层中形成接触孔; （iii）在接触孔的侧面和底面部分上形成多晶硅膜; （iv）含钨气体与膜反应; 和（v）接触孔填充钨。

公开(公告)号：US20050275468A1

公开(公告)日：2005-12-15

申请号：US10857276

申请日：2004-05-28

申请人： Takao Kakiuchi ,  Takeshi Wakii ,  Sho Maruyama

发明人： Takao Kakiuchi ,  Takeshi Wakii ,  Sho Maruyama

IPC分类号： H03K3/03 ,  H03L7/00 ,  H03L7/099

CPC分类号： H03K3/0322 ,  H03L7/0995

摘要： A voltage controlled current source outputs oscillator drive current and oscillator equivalent current. A signal oscillator outputs first source oscillation signal and second source oscillation signal. A differential amplifier outputs first amplification oscillation signal and second amplification oscillation signal. First switch circuit and second switch circuit output first current oscillation signal and second current oscillation signal, respectively. A first current value converter-amplifier circuit converts a value of the first current oscillation signal whereas a second current value converter-amplifier circuit converts a value of the second current oscillation signal, so that the thus converted values become output current finally. An adder outputs to the differential amplifier a differential amplifier drive current in which equivalent current for use with conversion is added up with the oscillator equivalent current outputted from the voltage controlled current source.

摘要翻译： 电压控制电流源输出振荡器驱动电流和振荡器等效电流。 信号振荡器输出第一源振荡信号和第二源振荡信号。 差分放大器输出第一放大振荡信号和第二放大振荡信号。 第一开关电路和第二开关电路分别输出第一电流振荡信号和第二电流振荡信号。 第一电流值转换器放大器电路转换第一电流振荡信号的值，而第二电流值转换器放大器电路转换第二电流振荡信号的值，使得最终转换的值变为输出电流。 加法器向差分放大器输出差分放大器驱动电流，其中用于转换的等效电流与从压控电流源输出的振荡器等效电流相加。

公开(公告)号：US20050275467A1

公开(公告)日：2005-12-15

申请号：US10857275

申请日：2004-05-28

申请人： Takao Kakiuchi ,  Takeshi Wakii ,  Sho Maruyama

发明人： Takao Kakiuchi ,  Takeshi Wakii ,  Sho Maruyama

IPC分类号： H03L7/00 ,  H03L7/099

CPC分类号： H03L7/0995

摘要： A voltage controlled current source outputs oscillator drive current and oscillator equivalent current. A signal oscillator outputs first source oscillation signal and second source oscillation signal. An amplifier outputs first amplification oscillation signal and second amplification oscillation signal. First switch circuit and second switch circuit output first current oscillation signal and second current oscillation signal, respectively. A first current value converter-amplifier circuit converts a value of the first current oscillation signal whereas a second current value converter-amplifier circuit converts a value of the second current oscillation signal, so that the thus converted values become output current finally. An adder outputs to the amplifier an amplifier drive current in which equivalent current for use with conversion is added up with the oscillator equivalent current outputted from the voltage controlled current source.

摘要翻译： 电压控制电流源输出振荡器驱动电流和振荡器等效电流。 信号振荡器输出第一源振荡信号和第二源振荡信号。 放大器输出第一放大振荡信号和第二放大振荡信号。 第一开关电路和第二开关电路分别输出第一电流振荡信号和第二电流振荡信号。 第一电流值转换器放大器电路转换第一电流振荡信号的值，而第二电流值转换器放大器电路转换第二电流振荡信号的值，使得最终转换的值变为输出电流。 加法器向放大器输出放大器驱动电流，其中用于转换的等效电流与从压控电流源输出的振荡器等效电流相加。

公开(公告)号：US07362189B2

公开(公告)日：2008-04-22

申请号：US10857276

申请日：2004-05-28

申请人： Takao Kakiuchi ,  Takeshi Wakii ,  Sho Maruyama

发明人： Takao Kakiuchi ,  Takeshi Wakii ,  Sho Maruyama

IPC分类号： H03K3/03

CPC分类号： H03K3/0322 ,  H03L7/0995

摘要： A voltage controlled current source outputs oscillator drive current and oscillator equivalent current. A signal oscillator outputs first source oscillation signal and second source oscillation signal. A differential amplifier outputs first amplification oscillation signal and second amplification oscillation signal. First switch circuit and second switch circuit output first current oscillation signal and second current oscillation signal, respectively. A first current value converter-amplifier circuit converts a value of the first current oscillation signal whereas a second current value converter-amplifier circuit converts a value of the second current oscillation signal, so that the thus converted values become output current finally. An adder outputs to the differential amplifier a differential amplifier drive current in which equivalent current for use with conversion is added up with the oscillator equivalent current outputted from the voltage controlled current source.

摘要翻译： 电压控制电流源输出振荡器驱动电流和振荡器等效电流。 信号振荡器输出第一源振荡信号和第二源振荡信号。 差分放大器输出第一放大振荡信号和第二放大振荡信号。 第一开关电路和第二开关电路分别输出第一电流振荡信号和第二电流振荡信号。 第一电流值转换器放大器电路转换第一电流振荡信号的值，而第二电流值转换器放大器电路转换第二电流振荡信号的值，使得最终转换的值变为输出电流。 加法器向差分放大器输出差分放大器驱动电流，其中用于转换的等效电流与从压控电流源输出的振荡器等效电流相加。

公开(公告)号：US5225361A

公开(公告)日：1993-07-06

申请号：US727125

申请日：1991-07-09

申请人： Takao Kakiuchi ,  Kazuo Sato

发明人： Takao Kakiuchi ,  Kazuo Sato

IPC分类号： H01L21/336 ,  H01L27/115 ,  H01L29/788

CPC分类号： H01L29/66825 ,  H01L29/7883 ,  H01L27/115

摘要： A long-life, electrically writable and erasable non-volatile semiconductor memory device is disclosed. The memory device is fabricated in the following steps. After forming a first gate insulating film on a semiconductor substrate, a window is opened in the first gate insulating film to expose a portion of the surface of the semiconductor substrate, using a two-step etching technique in which dry etching and wet etching are performed successively. The exposed portion of the semiconductor substrate not over-etched is selectively oxidized to form a tunnel insulating film (second gate insulating film) having edge portions resistant to dielectric breakdown. Thereafter, a floating gate, a third gate insulating film, and a control gate are formed sequentially. The floating gate is patterned in such a way as to cover the entire tunnel insulating film or cross only a portion of an edge of the tunnel insulating film. The stress caused to the tunnel insulating film as a result of the oxidation process for forming the third gate insulating film is relieved, providing the tunnel insulating film with resistance to dielectric strength.

公开(公告)号：US5210597A

公开(公告)日：1993-05-11

申请号：US664207

申请日：1991-03-04

申请人： Takao Kakiuchi ,  Kazuo Sato

发明人： Takao Kakiuchi ,  Kazuo Sato

IPC分类号： H01L21/8247 ,  G11C11/34 ,  H01L21/336 ,  H01L27/115 ,  H01L29/34 ,  H01L29/68 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L29/66825 ,  H01L29/7883 ,  H01L27/115

摘要： A long-life, electrically writable and erasable non-volatile semiconductor memory device is disclosed. The memory device is fabricated in the following steps. After forming a first gate insulating film on a semiconductor substrate, a window is opened in the first gate insulating film to expose a portion of the surface of the semiconductor substrate, using a two-step etching technique in which dry etching and wet etching are performed successively. The exposed portion of the semiconductor substrate not over-etched is selectively oxidized to form a tunnel insulating film (second gate insulating film) having edge portions resistant to dielectric breakdown. Thereafter, a floating gate, a third gate insulating film, and a control gate are formed sequentially. The floating gate is patterned in such a way as to cover the entire tunnel insulating film or cross only a portion of an edge of the tunnel insulating film. The stress caused to the tunnel insulating film as a result of the oxidation process for forming the third gate insulating film is relieved, providing the tunnel insulating film with resistance to dielectric strength.

摘要翻译： 公开了一种长寿命的电可写和可擦除非易失性半导体存储器件。 存储器件按以下步骤制造。 在半导体衬底上形成第一栅极绝缘膜之后，在第一栅极绝缘膜中打开窗口，以使用执行干蚀刻和湿蚀刻的两步蚀刻技术来露出半导体衬底的一部分表面 依次。 未过蚀刻的半导体衬底的暴露部分被选择性地氧化以形成具有耐绝缘击穿的边缘部分的隧道绝缘膜（第二栅极绝缘膜）。 此后，依次形成浮栅，第三栅绝缘膜和控制栅。 浮栅被图案化以覆盖整个隧道绝缘膜或仅交叉隧道绝缘膜的边缘的一部分。 由于形成第三栅极绝缘膜的氧化工艺，隧道绝缘膜产生的应力得以缓解，为绝缘强度提供了隧道绝缘膜。

公开(公告)号：US5336913A

公开(公告)日：1994-08-09

申请号：US916342

申请日：1992-07-17

申请人： Takao Kakiuchi ,  Kazuo Sato

发明人： Takao Kakiuchi ,  Kazuo Sato

IPC分类号： H01L21/8247 ,  G11C11/34 ,  H01L21/336 ,  H01L27/115 ,  H01L29/34 ,  H01L29/68 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L29/66825 ,  H01L29/7883 ,  H01L27/115

摘要： A long-life, electrically writable and erasable non-volatile semiconductor memory device is disclosed. The memory device is fabricated in the following steps. After forming a first gate insulating film on a semiconductor substrate, a window is opened in the first gate insulating film to expose a portion of the surface of the semiconductor substrate, using a two-step etching technique in which dry etching and wet etching are performed successively. The exposed portion of the semiconductor substrate not over-etched is selectively oxidized to form a tunnel insulating film (second gate insulating film) having edge portions resistant to dielectric breakdown. Thereafter, a floating gate, a third gate insulating film, and a control gate are formed sequentially. The floating gate is patterned in such a way as to cover the entire tunnel insulating film or cross only a portion of an edge of the tunnel insulating film. The stress caused to the tunnel insulating film as a result of the oxidation process for forming the third gate insulating film is relieved, providing the tunnel insulating film with resistance to dielectric strength.

摘要翻译： 公开了一种长寿命的电可写和可擦除非易失性半导体存储器件。 存储器件按以下步骤制造。 在半导体衬底上形成第一栅极绝缘膜之后，在第一栅极绝缘膜中打开窗口，以使用执行干蚀刻和湿蚀刻的两步蚀刻技术来露出半导体衬底的一部分表面 依次。 未过蚀刻的半导体衬底的暴露部分被选择性地氧化以形成具有耐绝缘击穿的边缘部分的隧道绝缘膜（第二栅极绝缘膜）。 此后，依次形成浮栅，第三栅绝缘膜和控制栅。 浮栅被图案化以覆盖整个隧道绝缘膜或仅交叉隧道绝缘膜的边缘的一部分。 由于形成第三栅极绝缘膜的氧化工艺，隧道绝缘膜产生的应力得以缓解，为绝缘强度提供了隧道绝缘膜。

公开(公告)号：US5204285A

公开(公告)日：1993-04-20

申请号：US855459

申请日：1992-03-19

申请人： Takao Kakiuchi

发明人： Takao Kakiuchi

IPC分类号： H01L21/3213

CPC分类号： H01L21/32139 ,  Y10S438/945

摘要： A method for patterning a metal layer without so-called "rabbit ears" comprising the steps of:deposition of a metal layer on a substrate, deposition of a barrier layer on the metal layer, formation of a mask layer of a predetermined pattern on the barrier layer, etching of the barrier layer and the metal layer under conditions such that the mask layer is also eroded slightly, and removal of the mask layer. In other embodiments, selective etching of barrier layer and mask sidewalls avoids or eliminates such "rabbit ears" and/or etchant product deposits which are precursors of such "rabbit ears".

摘要翻译： 用于图案化没有所谓的“兔耳”的金属层的方法包括以下步骤：在基底上沉积金属层，在金属层上沉积阻挡层，在该层上形成预定图案的掩模层 阻挡层，阻挡层和金属层的蚀刻，使得掩模层也被轻微侵蚀，并除去掩模层。 在其他实施例中，阻挡层和掩模侧壁的选择性蚀刻避免或消除作为这种“兔耳”的前体的这种“兔耳”和/或蚀刻剂产品沉积物。