Semiconductor device and process
    4.
    发明授权
    Semiconductor device and process 失效
    半导体器件和工艺

    公开(公告)号:US5633211A

    公开(公告)日:1997-05-27

    申请号:US347114

    申请日:1994-11-23

    摘要: The characteristic of semiconductor devices is satisfactorily maintained because the planarization of a dielectric film of a semiconductor device is carried out at a lower flow temperature. In the case of a silicon dioxide film being a dielectric film, a network structure is composed of atoms of silicon which serve as a main constituent, and of atoms of oxygen which serve as a sub-constituent of a matrix of the dielectric film. These oxygen atoms are replaced by non-bridging constituents such as atoms of halogen including fluorine. This breaks a bridge, via an oxygen atom, between the silicon atoms, at a position where such a replacement takes place. In consequence, the viscosity of the dielectric film falls with the flow temperature. If, for example, part of the oxygen in a BPSG film is substituted by fluorine, this allows the dielectric film to flow at a lower temperature of 850.degree. C. The short channel effects can be suppressed.

    摘要翻译: 由于半导体器件的电介质膜的平坦化在较低的流动温度下进行,因此令人满意地保持半导体器件的特性。 在作为电介质膜的二氧化硅膜的情况下,网状结构由作为主要成分的硅原子和作为电介质膜的基体的副成分的氧原子构成。 这些氧原子被诸如卤素原子包括氟的非桥连组分替代。 在发生这种替换的位置上,这通过氧原子在硅原子之间断开桥。 因此,电介质膜的粘度随流动温度而下降。 例如,如果BPSG膜中的氧的一部分被氟取代,则允许电介质膜在850℃的较低温度下流动。可以抑制短的通道效应。

    Method of producing multilayer wiring device with offset axises of upper and lower plugs
    7.
    发明授权
    Method of producing multilayer wiring device with offset axises of upper and lower plugs 失效
    制造具有上,下插头偏移轴的多层布线装置的方法

    公开(公告)号:US06197685B1

    公开(公告)日:2001-03-06

    申请号:US09113370

    申请日:1998-07-01

    IPC分类号: H01L214763

    摘要: A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.

    摘要翻译: 布置具有层叠结构的半导体器件的多层布线结构,以抑制由于施加到相对的上部和下部插塞之间的布线区域的应力的可靠性降低。 上插头与下插头与布线之间的接触面上的布线之间的接触面的重叠速率小,不产生空隙的程度。 制造多层布线结构,使得在上部和下部插塞之间的布线区域中不包含晶界。 布线材料与上,下插头材料之间的热膨胀系数差异小到不产生空隙的程度。

    Apparatus and method for forming thin film
    8.
    发明授权
    Apparatus and method for forming thin film 失效
    用于形成薄膜的装置和方法

    公开(公告)号:US5501739A

    公开(公告)日:1996-03-26

    申请号:US158305

    申请日:1993-11-29

    摘要: A forming apparatus of a thin film includes a processing chamber where a predetermined process is carried out on a surface of a supplied substrate. A feeding device is provided in the processing chamber for feeding material to form an organic molecular layer including silicon or germanium on the surface of the substrate. A forming method of a thin film includes the steps of forming the thin film on the surface of the supplied substrate in the processing chamber, and feeding material for forming the organic molecular layer, including silicon or germanium, on the formed thin film on the surface of the substrate through a feeding device in the processing chamber, and then forming the organic molecular layer on the surface of the substrate.

    摘要翻译: 薄膜的形成装置包括处理室,其中在所提供的基板的表面上进行预定的处理。 在处理室中设置有供给装置,用于供给材料以在基板的表面上形成包括硅或锗的有机分子层。 薄膜的形成方法包括以下步骤:在处理室中供应的基板的表面上形成薄膜,以及在表面上形成的薄膜上形成有机分子层(包括硅或锗)的材料 通过处理室中的进料装置,然后在基材表面上形成有机分子层。