公开(公告)号：US20090141207A1

公开(公告)日：2009-06-04

申请号：US12255908

申请日：2008-10-22

申请人： Yoon-Sung UM ,  Hoon Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

发明人： Yoon-Sung UM ,  Hoon Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

IPC分类号： G02F1/136 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L29/6675 ,  G02F1/13624 ,  G02F2001/134345 ,  H01L27/1288

摘要： In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.

摘要翻译： 在薄膜晶体管中，第一和第二薄膜晶体管连接到第N栅极线和第M数据线，第一和第二子像素电极分别连接到第一和第二薄膜晶体管。 第三薄膜晶体管包括连接到第（N + 1）栅极线的栅电极，与栅电极重叠的半导体层，连接到第二子像素电极并与栅电极部分重叠的源极， 漏电极面对源电极。 第一辅助电极连接到漏电极并且设置在与第一和第二子像素电极相同的层上。 相对电极布置在与栅极线相同的层上，并且与第一辅助电极至少部分重叠，并且其间设置有至少一个绝缘层。

公开(公告)号：US08330889B2

公开(公告)日：2012-12-11

申请号：US13217054

申请日：2011-08-24

申请人： Yoon-Sung Um ,  Hoon Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

发明人： Yoon-Sung Um ,  Hoon Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

IPC分类号： G02F1/1368 ,  H01L21/336 ,  H01L27/15

CPC分类号： H01L29/6675 ,  G02F1/13624 ,  G02F2001/134345 ,  H01L27/1288

摘要： In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.

摘要翻译： 在薄膜晶体管中，第一和第二薄膜晶体管连接到第N栅极线和第M数据线，第一和第二子像素电极分别连接到第一和第二薄膜晶体管。 第三薄膜晶体管包括连接到第（N + 1）栅极线的栅电极，与栅电极重叠的半导体层，连接到第二子像素电极并与栅电极部分重叠的源极， 漏电极面对源电极。 第一辅助电极连接到漏电极并且设置在与第一和第二子像素电极相同的层上。 相对电极布置在与栅极线相同的层上，并且与第一辅助电极至少部分重叠，并且其间设置有至少一个绝缘层。

公开(公告)号：US20090096976A1

公开(公告)日：2009-04-16

申请号：US12194058

申请日：2008-08-19

申请人： Hoon Kim ,  Jae-Jin Lyu ,  Hye-Ran You

发明人： Hoon Kim ,  Jae-Jin Lyu ,  Hye-Ran You

IPC分类号： G02F1/1343 ,  G02F1/13

CPC分类号： G02F1/1393 ,  G02F2001/134345 ,  G09G3/3614 ,  G09G3/3651 ,  G09G2300/0443 ,  G09G2300/0491 ,  G09G2320/0238 ,  G09G2320/028

摘要： In a liquid crystal display, an image-defining data voltage is simultaneously applied to a main pixel electrode (MPE) and an electrically isolatable sub pixel electrode (SPE) to thereby respectively define a main pixel voltage and a sub pixel voltage. The MPE defines one plate of a first capacitor whose other plate receives a first common voltage whose voltage level can be varied after the image-defining data voltage is applied. Thus the main pixel voltage is shifted up or shifted down according to the voltage variation of the first common voltage. The SPE defines one plate of a second capacitor whose other plate receives a second common voltage. By causing the main pixel voltage to be of greater absolute amplitude than the sub pixel voltage, a side visibility of the liquid crystal display can be enhanced. Also, the liquid crystal display utilizes a liquid crystal having a dielectric anisotropy and an elastic constant ratio within a specific range, so that an undesirable increase of a black brightness effect is reduced and thus image contrast is not adversely affected.

摘要翻译： 在液晶显示器中，将图像定义数据电压同时施加到主像素电极（MPE）和电隔离子像素电极（SPE），从而分别限定主像素电压和子像素电压。 MPE定义了第一电容器的一个板，其另一个板接收在施加图像定义数据电压之后电压电平可以改变的第一公共电压。 因此，主像素电压根据第一公共电压的电压变化向上移位或向下移动。 SPE定义了第二电容器的一个板，其另一个板接收第二公共电压。 通过使主像素电压成为比子像素电压更大的绝对幅度，可以提高液晶显示器的侧面可见度。 此外，液晶显示器利用在特定范围内具有介电各向异性和弹性常数比的液晶，从而降低黑色亮度效果的不期望的增加，因此不会对图像对比度产生不利影响。

公开(公告)号：US08026991B2

公开(公告)日：2011-09-27

申请号：US12255908

申请日：2008-10-22

申请人： Yoon-Sung Um ,  Hoon Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

发明人： Yoon-Sung Um ,  Hoon Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

IPC分类号： G02F1/136 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L29/6675 ,  G02F1/13624 ,  G02F2001/134345 ,  H01L27/1288

摘要： In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.

摘要翻译： 在薄膜晶体管中，第一和第二薄膜晶体管连接到第N栅极线和第M数据线，第一和第二子像素电极分别连接到第一和第二薄膜晶体管。 第三薄膜晶体管包括连接到第（N + 1）栅极线的栅电极，与栅电极重叠的半导体层，连接到第二子像素电极并与栅电极部分重叠的源极， 漏电极面对源电极。 第一辅助电极连接到漏电极并且设置在与第一和第二子像素电极相同的层上。 相对电极布置在与栅极线相同的层上，并且与第一辅助电极至少部分重叠，并且其间设置有至少一个绝缘层。

公开(公告)号：US20090002583A1

公开(公告)日：2009-01-01

申请号：US12077496

申请日：2008-03-18

申请人： Hye-ran You ,  Yoon-sung Um ,  Jae-Jin Lyu ,  Seung-beom Park ,  Jin-won Park ,  Hoon Kim

发明人： Hye-ran You ,  Yoon-sung Um ,  Jae-Jin Lyu ,  Seung-beom Park ,  Jin-won Park ,  Hoon Kim

IPC分类号： G02F1/133

CPC分类号： G02F1/13624 ,  G02F1/136213 ,  G02F2001/134345

摘要： A display apparatus including a plurality of gate lines, a data line intersecting the plurality of gate lines; a first pixel unit connected with a n-th gate line of the plurality of gate lines and the data line. A second pixel unit connected with a (n+1)-th gate line of the plurality of gate lines; and a coupling capacitor disposed between the first pixel unit and the second pixel unit, wherein the first pixel unit comprises a first liquid crystal capacitor and a first thin film transistor (TFT), the second pixel unit comprises a second liquid crystal capacitor and a second thin film transistor (TFT), and a source electrode and a drain electrode of the second TFT are connected with both electrodes of the coupling capacitor, respectively.

摘要翻译： 一种显示装置，包括多条栅极线，与多条栅极线相交的数据线; 与多条栅极线的第n条栅极线和数据线连接的第一像素单元。 与所述多个栅极线中的第（n + 1）栅极线连接的第二像素单元; 以及设置在所述第一像素单元和所述第二像素单元之间的耦合电容器，其中所述第一像素单元包括第一液晶电容器和第一薄膜晶体管（TFT），所述第二像素单元包括第二液晶电容器和第二液晶电容器 薄膜晶体管（TFT），第二TFT的源电极和漏电极分别与耦合电容器的两个电极连接。

公开(公告)号：US20100019998A1

公开(公告)日：2010-01-28

申请号：US12413149

申请日：2009-03-27

申请人： Hye-Ran YOU ,  Yoon-Sung Um ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park

发明人： Hye-Ran YOU ,  Yoon-Sung Um ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park

IPC分类号： G09G3/36 ,  H01L33/00 ,  H01L21/28

CPC分类号： G02F1/1393 ,  G02F1/133707 ,  G02F2001/13606

摘要： In an array substrate, a method of manufacturing the array substrate, and a liquid crystal display (LCD) device having the array substrate, a pixel electrode includes an outline portion, connection portions, and slit portions. The outline portion is arranged toward a data line and a gate line thereon, and the connection portions extend in a direction that crosses the data line and the gate line, respectively, to connect to the outline portion. The slit portions protrude from side surfaces of the connection portions to connect to the outline portion. A shielding electrode is arranged toward the outline portion between the data line and the outline portion, and the gate line and the outline portion.

摘要翻译： 在阵列基板中，制造阵列基板的方法以及具有阵列基板的液晶显示（LCD）装置，像素电极包括轮廓部分，连接部分和狭缝部分。 轮廓部分朝向数据线和其上的栅极线布置，并且连接部分分别在与数据线和栅极线交叉的方向上延伸以连接到轮廓部分。 狭缝部分从连接部分的侧表面突出以连接到轮廓部分。 屏蔽电极朝向数据线和轮廓部分之间的轮廓部分以及栅极线和轮廓部分设置。

公开(公告)号：US08564753B2

公开(公告)日：2013-10-22

申请号：US12688338

申请日：2010-01-15

申请人： Hye-Ran You ,  Su-Han Woo ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park ,  Yoon-Sung Um

发明人： Hye-Ran You ,  Su-Han Woo ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park ,  Yoon-Sung Um

IPC分类号： G02F1/1343

CPC分类号： G02F1/1393 ,  G02F1/134336 ,  G02F2201/40

摘要： A display substrate includes a base substrate and a unitary indivisible pixel electrode. The base substrate includes a gate line, a data line crossing the gate line and a thin-film transistor electrically connected to the gate line and the data line formed thereon. A pixel area is defined on the base substrate. The unitary indivisible pixel electrode includes a plurality of branch electrodes formed on the pixel area and a connection electrode connecting the branch electrodes to each other. Each of the branch electrodes includes a bent portion and the bent portions of adjacent branch electrodes are spaced apart from each other.

摘要翻译： 显示基板包括基底基板和整体不可分割的像素电极。 基极基板包括栅极线，与栅极线交叉的数据线和与栅极线电连接的薄膜晶体管和形成在栅极线上的数据线。 在基底基板上限定像素区域。 单位不可分割像素电极包括形成在像素区域上的多个分支电极和将分支电极彼此连接的连接电极。 每个分支电极包括弯曲部分，并且相邻分支电极的弯曲部分彼此间隔开。

公开(公告)号：US20120119215A1

公开(公告)日：2012-05-17

申请号：US13374787

申请日：2012-01-13

申请人： Hye-Ran You ,  Yoon-Sung Um ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park

发明人： Hye-Ran You ,  Yoon-Sung Um ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park

IPC分类号： H01L33/08

CPC分类号： G02F1/1393 ,  G02F1/133707 ,  G02F2001/13606

摘要： In an array substrate, a method of manufacturing the array substrate, and a liquid crystal display (LCD) device having the array substrate, a pixel electrode includes an outline portion, connection portions, and slit portions. The outline portion is arranged toward a data line and a gate line thereon, and the connection portions extend in a direction that crosses the data line and the gate line, respectively, to connect to the outline portion. The slit portions protrude from side surfaces of the connection portions to connect to the outline portion. A shielding electrode is arranged toward the outline portion between the data line and the outline portion, and the gate line and the outline portion.

公开(公告)号：US08199088B2

公开(公告)日：2012-06-12

申请号：US12413149

申请日：2009-03-27

申请人： Hye-Ran You ,  Yoon-Sung Um ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park

发明人： Hye-Ran You ,  Yoon-Sung Um ,  Su-Jeong Kim ,  Jae-Jin Lyu ,  Seung-Beom Park

IPC分类号： G09G3/36

CPC分类号： G02F1/1393 ,  G02F1/133707 ,  G02F2001/13606

摘要： In an array substrate, a method of manufacturing the array substrate, and a liquid crystal display (LCD) device having the array substrate, a pixel electrode includes an outline portion, connection portions, and slit portions. The outline portion is arranged toward a data line and a gate line thereon, and the connection portions extend in a direction that crosses the data line and the gate line, respectively, to connect to the outline portion. The slit portions protrude from side surfaces of the connection portions to connect to the outline portion. A shielding electrode is arranged toward the outline portion between the data line and the outline portion, and the gate line and the outline portion.

摘要翻译： 在阵列基板中，制造阵列基板的方法以及具有阵列基板的液晶显示（LCD）装置，像素电极包括轮廓部分，连接部分和狭缝部分。 轮廓部分朝向数据线和其上的栅极线布置，并且连接部分分别在与数据线和栅极线交叉的方向上延伸以连接到轮廓部分。 狭缝部分从连接部分的侧表面突出以连接到轮廓部分。 屏蔽电极朝向数据线和轮廓部分之间的轮廓部分以及栅极线和轮廓部分设置。

公开(公告)号：US08420302B2

公开(公告)日：2013-04-16

申请号：US12480132

申请日：2009-06-08

申请人： Yoon-Sung Um ,  Su-Jeong Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

发明人： Yoon-Sung Um ,  Su-Jeong Kim ,  Hye-Ran You ,  Jae-Jin Lyu ,  Seung-Beom Park

IPC分类号： G03F7/20

CPC分类号： G03F7/40 ,  G02F1/13439 ,  G02F2201/122 ,  G02F2201/123

摘要： A method of fine patterning a thin film and a method of manufacturing a display substrate by using the same, in which a fine photo pattern is formed on a base substrate, and a photoresist pattern is formed on the thin film. A fine photo pattern is formed by ashing the photoresist pattern. A fine pattern is formed by removing the thin film exposing through the fine photo pattern. A fine pattern is formed, and the fine pattern has a higher resolution than that of an exposure apparatus. The reliability of a process for manufacturing a display substrate and the display quality of a display device may be improved.

摘要翻译： 薄膜上形成精细图案化薄膜的方法和使用该方法制造显示基板的方法，其中在基底基板上形成精细的光图案，并且在薄膜上形成光致抗蚀剂图案。 通过灰化光致抗蚀剂图案形成精细的照片图案。 通过去除通过精细照片图案曝光的薄膜来形成精细图案。 形成精细图案，并且精细图案具有比曝光装置更高的分辨率。 可以提高制造显示基板的工艺的可靠性和显示装置的显示质量。