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1.发明授权公开(公告)号：US07737983B2
公开(公告)日：2010-06-15
申请号：US11552693
申请日：2006-10-25
CPC分类号： G06F9/542 , G06F9/3879 , G06F9/485 , G06F9/526 , G06T1/20
摘要： A method for high level synchronization between an application and a graphics pipeline comprises receiving an application instruction in an input stream at a predetermined component, such as a command stream processor (CSP), as sent by a central processing unit. The CSP may have a first portion coupled to a next component in the graphics pipeline and a second portion coupled to a plurality of components of the graphics pipeline. A command associated with the application instruction may be forwarded from the first portion to the next component in the graphics pipeline or some other component coupled thereto. The command may be received and thereafter executed. A response may be communicated on a feedback path to the second portion of the CSP. Nonlimiting exemplary application instructions that may be received and executed by the CSP include check surface fault, trap, wait, signal, stall, flip, and trigger.
摘要翻译： 一种用于应用程序和图形流水线之间的高级别同步的方法包括：在由中央处理单元发送的诸如命令流处理器（CSP）的预定组件的输入流中接收应用程序指令。 CSP可以具有耦合到图形流水线中的下一个组件的第一部分和耦合到图形流水线的多个组件的第二部分。 与应用指令相关联的命令可以从第一部分转发到图形流水线中的下一个组件或与其耦合的一些其它组件。 该命令可以被接收并且此后被执行。 响应可以在反馈路径上传送到CSP的第二部分。 可以由CSP接收和执行的非限制性示例性应用指令包括检查表面故障，陷阱，等待，信号，失速，翻转和触发。
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公开(公告)号：US07545381B2
公开(公告)日：2009-06-09
申请号：US11272356
申请日：2005-11-10
申请人： Hsilin Huang , Timour Paltashev , John Brothers
发明人： Hsilin Huang , Timour Paltashev , John Brothers
CPC分类号： G06T15/005 , G06F9/461 , G06T1/20
摘要： A graphics processing unit (“GPU”) is configured to receive an interrupt command from a CPU or internal interrupt event while the GPU is processing a first context. The GPU saves the first context to memory and records a precise processing position for the first context corresponding to the point interrupted. Thereafter, the GPU loads a second context to the processing portion of the GPU from memory and begins executing instructions associated with the second context. After the second context is complete of if an interrupt command directs restoration of the first context, the GPU's processor switches to the first context for continued processing. The first context is retrieved from memory and restored to the precise processing position where previously interrupted. The GPU then processes a remainder portion of the first context from the precise processing point to an end of the first context.
摘要翻译： 图形处理单元（“GPU”）被配置为在GPU处理第一上下文时从CPU或内部中断事件接收中断命令。 GPU将第一上下文保存到存储器，并记录与中断点相对应的第一上下文的精确处理位置。 此后，GPU从存储器将第二上下文加载到GPU的处理部分，并开始执行与第二上下文相关联的指令。 在第二个上下文完成之后，如果中断命令指示第一个上下文的恢复，则GPU的处理器切换到第一上下文以继续处理。 第一个上下文从存储器中检索并恢复到之前中断的精确处理位置。 然后，GPU处理从精确处理点到第一上下文结束的第一上下文的余数部分。
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3.发明申请公开(公告)号：US20070091102A1
公开(公告)日：2007-04-26
申请号：US11552693
申请日：2006-10-25
IPC分类号： G06T1/20
CPC分类号： G06F9/542 , G06F9/3879 , G06F9/485 , G06F9/526 , G06T1/20
摘要： A method for high level synchronization between an application and a graphics pipeline comprises receiving an application instruction in an input stream at a predetermined component, such as a command stream processor (CSP), as sent by a central processing unit. The CSP may have a first portion coupled to a next component in the graphics pipeline and a second portion coupled to a plurality of components of the graphics pipeline. A command associated with the application instruction may be forwarded from the first portion to the next component in the graphics pipeline or some other component coupled thereto. The command may be received and thereafter executed. A response may be communicated on a feedback path to the second portion of the CSP. Nonlimiting exemplary application instructions that may be received and executed by the CSP include check surface fault, trap, wait, signal, stall, flip, and trigger.
摘要翻译： 一种用于应用程序和图形流水线之间的高级别同步的方法包括：在由中央处理单元发送的诸如命令流处理器（CSP）的预定组件的输入流中接收应用程序指令。 CSP可以具有耦合到图形流水线中的下一个组件的第一部分和耦合到图形流水线的多个组件的第二部分。 与应用指令相关联的命令可以从第一部分转发到图形流水线中的下一个组件或与其耦合的一些其它组件。 该命令可以被接收并且此后被执行。 响应可以在反馈路径上传送到CSP的第二部分。 可以由CSP接收和执行的非限制性示例性应用指令包括检查表面故障，陷阱，等待，信号，失速，翻转和触发。
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公开(公告)号：US08817029B2
公开(公告)日：2014-08-26
申请号：US11468435
申请日：2006-08-30
申请人： John Brothers , Timour Paltashev , Hsilin Huang , Qunfeng Liao
发明人： John Brothers , Timour Paltashev , Hsilin Huang , Qunfeng Liao
CPC分类号： G06F9/542 , G06F9/3879 , G06F9/485 , G06F9/526 , G06T1/20
摘要： A graphics pipeline configured to synchronize data processing according to signals and tokens has at least four components. The first component has one input and one output and communicates output tokens or wire signals after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The second component has one input and a plurality of outputs and communicates tokens or wire signals on one of the outputs after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The third component has a plurality of inputs and one output and communicates tokens or wire signals on the output after receiving tokens on one of the inputs, an internal event occurrence, or receipt of a signal on an input path. The fourth component has a plurality of inputs and a plurality of outputs and has the capabilities of both the third and forth components.
摘要翻译： 配置为根据信号和令牌同步数据处理的图形管线具有至少四个组件。 第一个组件具有一个输入和一个输出，并且在接收输入上的令牌，内部事件发生或输入路径上的信号接收之后传送输出令牌或有线信号。 第二分量具有一个输入和多个输出，并且在输入上接收令牌，内部事件发生或输入路径上的信号接收之后，在输出之一上传送令牌或有线信号。 第三组件具有多个输入和一个输出，并且在输入之一上接收令牌，内部事件发生或输入路径上的信号接收之后，在输出端上传送令牌或有线信号。 第四组件具有多个输入和多个输出，并且具有第三和第四组件的能力。
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公开(公告)号：US07583268B2
公开(公告)日：2009-09-01
申请号：US11272220
申请日：2005-11-10
申请人： Hsilin Huang , Timour Paltashev , John Brothers
发明人： Hsilin Huang , Timour Paltashev , John Brothers
CPC分类号： G06T1/20
摘要： A graphics processing unit (“GPU”) is configured to interrupt processing of a first context and to initiate processing of a second context upon command. A command processor communicates an interrupt signal on a communication path from to a plurality of pipeline processing blocks in a graphics pipeline. A token, which corresponds to an end of an interrupted context, is forwarded from the command processor to a first pipeline processing block and subsequently to other pipeline blocks in the graphics pipeline. Each pipeline processing block discards contents of associated memory units upon receipt of the interrupt signal until the token is reached. The token may be forwarded to one or more additional pipeline processing blocks and memory units so that the token is communicated throughout the graphics pipeline to flush data associated with the first context. Data associated with the second context may follow behind the token through graphics pipeline.
摘要翻译： 图形处理单元（“GPU”）被配置为中断第一上下文的处理并根据命令启动对第二上下文的处理。 命令处理器在图形管线中的多个流水线处理块的通信路径上传送中断信号。 对应于中断上下文的结束的令牌从命令处理器转发到第一流水线处理块，并且随后传送到图形管线中的其他流水线块。 每个流水线处理块在接收到中断信号后丢弃相关存储器单元的内容，直到达到令牌。 令牌可以被转发到一个或多个附加流水线处理块和存储器单元，使得令牌在整个图形流水线中被通信以刷新与第一上下文相关联的数据。 与第二个上下文关联的数据可能通过图形流水线跟随令牌。
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公开(公告)号：US20070103474A1
公开(公告)日：2007-05-10
申请号：US11272220
申请日：2005-11-10
申请人： Hsilin Huang , Timour Paltashev , John Brothers
发明人： Hsilin Huang , Timour Paltashev , John Brothers
IPC分类号： G06T1/20
CPC分类号： G06T1/20
摘要： A graphics processing unit (“GPU”) is configured to interrupt processing of a first context and to initiate processing of a second context upon command. A command processor communicates an interrupt signal on a communication path from to a plurality of pipeline processing blocks in a graphics pipeline. A token, which corresponds to an end of an interrupted context, is forwarded from the command processor to a first pipeline processing block and subsequently to other pipeline blocks in the graphics pipeline. Each pipeline processing block discards contents of associated memory units upon receipt of the interrupt signal until the token is reached. The token may be forwarded to one or more additional pipeline processing blocks and memory units so that the token is communicated throughout the graphics pipeline to flush data associated with the first context. Data associated with the second context may follow behind the token through graphics pipeline.
摘要翻译： 图形处理单元（“GPU”）被配置为中断第一上下文的处理并根据命令启动对第二上下文的处理。 命令处理器在图形管线中的多个流水线处理块的通信路径上传送中断信号。 对应于中断上下文的结束的令牌从命令处理器转发到第一流水线处理块，随后转发到图形流水线中的其他流水线块。 每个流水线处理块在接收到中断信号后丢弃相关存储器单元的内容，直到达到令牌。 令牌可以被转发到一个或多个附加流水线处理块和存储器单元，使得令牌在整个图形流水线中被通信以刷新与第一上下文相关联的数据。 与第二个上下文关联的数据可能通过图形流水线跟随令牌。
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公开(公告)号：US20070091100A1
公开(公告)日：2007-04-26
申请号：US11468435
申请日：2006-08-30
申请人： John Brothers , Timour Paltashev , Hsilin Huang , Qunfeng Liao
发明人： John Brothers , Timour Paltashev , Hsilin Huang , Qunfeng Liao
IPC分类号： G06T1/20
CPC分类号： G06F9/542 , G06F9/3879 , G06F9/485 , G06F9/526 , G06T1/20
摘要： A graphics pipeline configured to synchronize data processing according to signals and tokens has at least four components. The first component has one input and one output and communicates output tokens or wire signals after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The second component has one input and a plurality of outputs and communicates tokens or wire signals on one of the outputs after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The third component has a plurality of inputs and one output and communicates tokens or wire signals on the output after receiving tokens on one of the inputs, an internal event occurrence, or receipt of a signal on an input path. The fourth component has a plurality of inputs and a plurality of outputs and has the capabilities of both the third and forth components.
摘要翻译： 配置为根据信号和令牌同步数据处理的图形管线具有至少四个组件。 第一个组件具有一个输入和一个输出，并且在接收输入上的令牌，内部事件发生或输入路径上的信号接收之后传送输出令牌或有线信号。 第二分量具有一个输入和多个输出，并且在输入上接收令牌，内部事件发生或输入路径上的信号接收之后，在输出之一上传送令牌或有线信号。 第三组件具有多个输入和一个输出，并且在输入之一上接收令牌，内部事件发生或输入路径上的信号接收之后，在输出端上传送令牌或有线信号。 第四组件具有多个输入和多个输出，并且具有第三和第四组件的能力。
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公开(公告)号：US20100110089A1
公开(公告)日：2010-05-06
申请号：US12266115
申请日：2008-11-06
IPC分类号： G06T1/00
CPC分类号： G06T1/20
摘要： Included are systems and methods for Graphics Processing Unit (GPU) synchronization. At least one embodiment of a system includes at least one producer GPU configured to receive data related to at least one context, the at least one producer GPU further configured to process at least a portion of the received data. Some embodiments include at least one consumer GPU configured to received data from the producer GPU, the consumer GPU further configured to stall execution of the received data until a fence value is received.
摘要翻译： 包括用于图形处理单元（GPU）同步的系统和方法。 系统的至少一个实施例包括被配置为接收与至少一个上下文相关的数据的至少一个生成器GPU，所述至少一个生成器GPU还被配置为处理所接收的数据的至少一部分。 一些实施例包括被配置为从生成器GPU接收数据的至少一个消费者GPU，消费者GPU还被配置为停止所接收的数据的执行，直到接收到围栏值。
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9.发明授权Metaprocessor for GPU control and synchronization in a multiprocessor environment 有权用于多处理器环境中GPU控制和同步的元处理器公开(公告)号：US08368701B2
公开(公告)日：2013-02-05
申请号：US12266034
申请日：2008-11-06
CPC分类号： G06T1/20 , G06F9/30072 , G06F9/30094 , G06F9/3867 , G06F9/3877 , G06F9/3885 , G06F9/3897 , G06F13/14 , G06F15/7867
摘要： Included are embodiments of systems and methods for processing metacommands. In at least one exemplary embodiment a Graphics Processing Unit (GPU) includes a metaprocessor configured to process at least one context register, the metaprocessor including context management logic and a metaprocessor control register block coupled to the metaprocessor, the metaprocessor control register block configured to receive metaprocessor configuration data, the metaprocessor control register block further configured to define metacommand execution logic block behavior. Some embodiments include a Bus Interface Unit (BIU) configured to provide the access from a system processor to the metaprocessor and a GPU command stream processor configured to fetch a current context command stream and send commands for execution to a GPU pipeline and metaprocessor.
摘要翻译： 包括用于处理元命令的系统和方法的实施例。 在至少一个示例性实施例中，图形处理单元（GPU）包括配置成处理至少一个上下文寄存器的元处理器，所述元处理器包括上下文管理逻辑和耦合到元处理器的元处理器控制寄存器块，所述元处理器控制寄存器块被配置为接收 元处理器配置数据，元处理器控制寄存器块进一步配置为定义metacommand执行逻辑块行为。 一些实施例包括被配置为提供从系统处理器到元处理器的访问的总线接口单元（BIU）以及被配置为获取当前上下文命令流并且发送用于执行到GPU流水线和元处理器的命令的GPU命令流处理器。
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公开(公告)号：US20100115249A1
公开(公告)日：2010-05-06
申请号：US12266078
申请日：2008-11-06
IPC分类号： G06F9/312
CPC分类号： G06F9/461 , G06F9/30087 , G06F9/3851 , G06F9/3885
摘要： Included are systems and methods for supporting a plurality of Graphics Processing Units (GPUs). At least one embodiment of a system includes a context status register configured to send data related to a status of at least one context and a context switch configuration register configured to send instructions related to at least one event for the at least one context. At least one embodiment of a system includes a context status management component coupled to the context status register and the context switch configuration register.
摘要翻译： 包括用于支持多个图形处理单元（GPU）的系统和方法。 系统的至少一个实施例包括配置成发送与至少一个上下文的状态相关的数据的上下文状态寄存器和被配置为发送与至少一个上下文的至少一个事件有关的指令的上下文切换配置寄存器。 系统的至少一个实施例包括耦合到上下文状态寄存器和上下文切换配置寄存器的上下文状态管理组件。
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