公开(公告)号：US07576807B2

公开(公告)日：2009-08-18

申请号：US11427416

申请日：2006-06-29

申请人： Hui-Chang Chen ,  Tsung-Yu Lin ,  Chin-Yu Huang

发明人： Hui-Chang Chen ,  Tsung-Yu Lin ,  Chin-Yu Huang

IPC分类号： G02F1/1333

CPC分类号： G02F1/1309 ,  G09G3/006 ,  G09G2330/12

摘要： A display panel comprising a substrate, a display array formed on the substrate, and a test circuit disposed on the substrate and comprising shorting bars, testing lines, a first and a second isolation layers, and a conductive structure. The shorting bars include a first short bar. The testing lines include a first testing line vertical with the first shorting bar and electrically connecting the display array. The first isolation layer is formed between the shorting bars and the testing lines. The second isolation layer is disposed on the shorting bars, the testing lines, and the first isolation layer and has a first and a second holes, which correspond to the first shorting bar. The second hole penetrates through the first isolation layer. The conductive structure is formed on the second isolation layer and electrically connects the first testing line and the first shorting bar through the first and second holes.

摘要翻译： 一种显示面板，包括基板，形成在基板上的显示阵列，以及设置在基板上并包括短路棒，测试线，第一和第二隔离层以及导电结构的测试电路。 短路棒包括第一个短条。 测试线包括垂直于第一短路杆的第一测试线并电连接显示器阵列。 第一隔离层形成在短路棒和测试线之间。 第二隔离层设置在短路棒，测试线和第一隔离层上，并具有与第一短路棒对应的第一和第二孔。 第二孔穿过第一隔离层。 导电结构形成在第二隔离层上，并通过第一和第二孔电连接第一测试线和第一短路棒。

公开(公告)号：US20070177066A1

公开(公告)日：2007-08-02

申请号：US11427416

申请日：2006-06-29

申请人： Hui-Chang Chen ,  Tsung-Yu Lin ,  Chin-Yu Huang

发明人： Hui-Chang Chen ,  Tsung-Yu Lin ,  Chin-Yu Huang

IPC分类号： G02F1/1333

CPC分类号： G02F1/1309 ,  G09G3/006 ,  G09G2330/12

摘要： A display panel comprising a substrate, a display array formed on the substrate, and a test circuit disposed on the substrate and comprising shorting bars, testing lines, a first and a second isolation layers, and a conductive structure. The shorting bars include a first short bar. The testing lines include a first testing line vertical with the first shorting bar and electrically connecting the display array. The first isolation layer is formed between the shorting bars and the testing lines. The second isolation layer is disposed on the shorting bars, the testing lines, and the first isolation layer and has a first and a second holes, which correspond to the first shorting bar. The second hole penetrates through the first isolation layer. The conductive structure is formed on the second isolation layer and electrically connects the first testing line and the first shorting bar through the first and second holes.

摘要翻译： 一种显示面板，包括基板，形成在基板上的显示阵列，以及设置在基板上并包括短路棒，测试线，第一和第二隔离层以及导电结构的测试电路。 短路棒包括第一个短条。 测试线包括垂直于第一短路杆的第一测试线并电连接显示器阵列。 第一隔离层形成在短路棒和测试线之间。 第二隔离层设置在短路棒，测试线和第一隔离层上，并具有与第一短路棒对应的第一和第二孔。 第二孔穿过第一隔离层。 导电结构形成在第二隔离层上，并通过第一和第二孔电连接第一测试线和第一短路棒。

公开(公告)号：US07576992B2

公开(公告)日：2009-08-18

申请号：US11424273

申请日：2006-06-15

申请人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

发明人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

IPC分类号： H05K1/00

CPC分类号： H05K3/361 ,  G02F1/13452 ,  H05K3/323 ,  H05K3/381 ,  H05K2201/09781

摘要： A flexible printed circuit comprising a substrate, a plurality of function lines, and a plurality of first dummy lines. The substrate comprises at least two periphery areas and an intermediate area. Each periphery area comprises a first layout region, a second layout region and a first rough region disposed between the first and second layout regions. The intermediate area is disposed between the periphery areas. The function lines are disposed on the substrate and within the intermediate area. The first dummy lines are disposed on the substrate and within the first or second layout area.

摘要翻译： 一种柔性印刷电路，包括基板，多个功能线和多个第一虚线。 衬底包括至少两个周边区域和中间区域。 每个周边区域包括第一布局区域，第二布局区域和布置在第一和第二布局区域之间的第一粗糙区域。 中间区域设置在周边区域之间。 功能线设置在基板上并在中间区域内。 第一虚线设置在基板上并且在第一或第二布局区域内。

公开(公告)号：US07489382B2

公开(公告)日：2009-02-10

申请号：US11882195

申请日：2007-07-31

申请人： Hui-Chang Chen

发明人： Hui-Chang Chen

IPC分类号： G02F1/1345

CPC分类号： G02F1/13452 ,  H05K1/117 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09781

摘要： A display module includes a glass substrate, a first lead group, a second lead group, and a plurality of first dummy leads. The first lead group and the second lead group are disposed on a marginal area of the glass substrate. There is a flexible printed circuit (FPC) disposed on the first lead group and the second lead group after a first anisotropic conductive film (ACF) is applied thereon. The first dummy leads are disposed between the first lead group and the second lead group and also on the marginal area of the glass substrate. The first lead group and the second lead group are covered with the first ACF, and the first dummy leads are also covered by the first ACF to improve the performance of adhesion of the first ACF to the glass substrate.

摘要翻译： 显示模块包括玻璃基板，第一引线组，第二引线组和多个第一虚拟引线。 第一引线组和第二引线组设置在玻璃基板的边缘区域上。 在其上施加第一各向异性导电膜（ACF）之后，设置在第一引线组和第二引线组上的柔性印刷电路（FPC）。 第一虚拟引线设置在第一引线组和第二引线组之间以及玻璃基板的边缘区域上。 第一引线组和第二引线组被第一ACF覆盖，并且第一虚拟引线也被第一ACF覆盖，以提高第一ACF对玻璃基板的粘附性能。

公开(公告)号：US20070144771A1

公开(公告)日：2007-06-28

申请号：US11424273

申请日：2006-06-15

申请人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

发明人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

IPC分类号： H05K1/00

CPC分类号： H05K3/361 ,  G02F1/13452 ,  H05K3/323 ,  H05K3/381 ,  H05K2201/09781

摘要： A flexible printed circuit comprising a substrate, a plurality of function lines, and a plurality of first dummy lines. The substrate comprises at least two periphery areas and an intermediate area. Each periphery area comprises a first layout region, a second layout region and a first rough region disposed between the first and second layout regions. The intermediate area is disposed between the periphery areas. The function lines are disposed on the substrate and within the intermediate area. The first dummy lines are disposed on the substrate and within the first or second layout area.

摘要翻译： 一种柔性印刷电路，包括基板，多个功能线和多个第一虚线。 衬底包括至少两个周边区域和中间区域。 每个周边区域包括第一布局区域，第二布局区域和布置在第一和第二布局区域之间的第一粗糙区域。 中间区域设置在周边区域之间。 功能线设置在基板上并在中间区域内。 第一虚线设置在基板上并且在第一或第二布局区域内。

公开(公告)号：US20050162603A1

公开(公告)日：2005-07-28

申请号：US10766536

申请日：2004-01-27

申请人： Ping-Chin Cheng ,  Hui-Chang Chen

发明人： Ping-Chin Cheng ,  Hui-Chang Chen

IPC分类号： G02F1/13 ,  G02F1/133 ,  G02F1/1345 ,  G09G3/36 ,  H01L21/60 ,  H05K3/32 ,  H05K3/36

CPC分类号： G02F1/13452 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/0781 ,  H01L2924/14 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/10674 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

摘要： A method for bonding integrated circuit chips and other devices to a liquid crystal display panel. The method involves using a single anisotropic conductive film that is sized to bond at least one integrated circuit chip and at least one other device, such as a flexible printed circuit board, a tape carrier package and a chip-on-film, to the liquid crystal display panel.

摘要翻译： 一种用于将集成电路芯片和其它器件接合到液晶显示面板的方法。 该方法包括使用单个各向异性导电膜，其大小适于将至少一个集成电路芯片和至少一个其它器件（例如柔性印刷电路板，载带封装和片上芯片）结合到液体 水晶显示面板。

公开(公告)号：US20050072597A1

公开(公告)日：2005-04-07

申请号：US10891921

申请日：2004-07-15

申请人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

发明人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

IPC分类号： G02F1/13 ,  H05K1/11 ,  H05K3/22 ,  H05K3/32 ,  H05K3/36

CPC分类号： G02F1/13452 ,  H05K1/113 ,  H05K3/225 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09436 ,  H05K2201/09509

摘要： A bonding pad structure of a display device. A first conductive layer is formed overlying a substrate, a protection layer is formed overlying the substrate and the first conductive layer, and a second conductive layer is formed overlying the protection layer. An opening structure penetrates the second conductive layer and the protection layer to expose the first conductive layer. A third conductive layer is formed overlying the second conductive layer to contact the sidewall and bottom of the opening structure. Thus, the third conductive layer is electrically connected to the second conductive layer to provide a first electrical-connection path, and the third conductive layer is electrically connected to the first conductive layer to provide a second electrical-connection path.

摘要翻译： 一种显示装置的焊盘结构。 第一导电层形成在衬底上，覆盖衬底和第一导电层形成保护层，并且形成覆盖保护层的第二导电层。 开口结构穿透第二导电层和保护层以暴露第一导电层。 形成第三导电层，覆盖第二导电层以接触开口结构的侧壁和底部。 因此，第三导电层电连接到第二导电层以提供第一电连接路径，并且第三导电层电连接到第一导电层以提供第二电连接路径。

公开(公告)号：US07507592B2

公开(公告)日：2009-03-24

申请号：US11688954

申请日：2007-03-21

申请人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

发明人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

IPC分类号： H01L21/60

CPC分类号： G02F1/13452 ,  H05K1/113 ,  H05K3/225 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09436 ,  H05K2201/09509

摘要： A bonding pad structure of a display device. A first conductive layer is formed overlying a substrate, a protection layer is formed overlying the substrate and the first conductive layer, and a second conductive layer is formed overlying the protection layer. An opening structure penetrates the second conductive layer and the protection layer to expose the first conductive layer. A third conductive layer is formed overlying the second conductive layer to contact the sidewall and bottom of the opening structure. Thus, the third conductive layer is electrically connected to the second conductive layer to provide a first electrical-connection path, and the third conductive layer is electrically connected to the first conductive layer to provide a second electrical-connection path.

摘要翻译： 一种显示装置的焊盘结构。 第一导电层形成在衬底上，覆盖衬底和第一导电层形成保护层，并且形成覆盖保护层的第二导电层。 开口结构穿透第二导电层和保护层以暴露第一导电层。 形成第三导电层，覆盖第二导电层以接触开口结构的侧壁和底部。 因此，第三导电层电连接到第二导电层以提供第一电连接路径，并且第三导电层电连接到第一导电层以提供第二电连接路径。

公开(公告)号：US07245012B2

公开(公告)日：2007-07-17

申请号：US10878084

申请日：2004-06-28

申请人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

发明人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/49816 ,  H01L27/124 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014

摘要： A thin film transistor (TFT) substrate includes a glass substrate, a thin film transistor, an electrode pad, and a conductive bump. The TFT and the electrode pad are formed on the glass substrate, and the electrode pad is used for electrically connecting with the thin film transistor. The conductive bump includes several insulating bumps and a conductive layer. The insulating bumps are formed on the electrode pad dividedly, and the conductive layer covers the top surfaces of the insulating bumps, the inward surfaces of the insulating bumps, and the electrode pad between the insulating bumps for electrically connecting with the electrode pad. The outward side surfaces of the insulating bumps are exposed out of the conductive layer.

摘要翻译： 薄膜晶体管（TFT）基板包括玻璃基板，薄膜晶体管，电极焊盘和导电凸块。 TFT和电极焊盘形成在玻璃基板上，并且电极焊盘用于与薄膜晶体管电连接。 导电凸块包括数个绝缘凸块和导电层。 绝缘凸块分别形成在电极焊盘上，并且导电层覆盖绝缘凸块的顶表面，绝缘凸块的内表面以及用于与电极焊盘电连接的绝缘凸块之间的电极焊盘。 绝缘凸块的外侧表面露出导电层。

公开(公告)号：US07211738B2

公开(公告)日：2007-05-01

申请号：US10891921

申请日：2004-07-15

申请人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

发明人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

IPC分类号： H01R12/04

CPC分类号： G02F1/13452 ,  H05K1/113 ,  H05K3/225 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09436 ,  H05K2201/09509

摘要： A bonding pad structure of a display device. A first conductive layer is formed overlying a substrate, a protection layer is formed overlying the substrate and the first conductive layer, and a second conductive layer is formed overlying the protection layer. An opening structure penetrates the second conductive layer and the protection layer to expose the first conductive layer. A third conductive layer is formed overlying the second conductive layer to contact the sidewall and bottom of the opening structure. Thus, the third conductive layer is electrically connected to the second conductive layer to provide a first electrical-connection path, and the third conductive layer is electrically connected to the first conductive layer to provide a second electrical-connection path.

摘要翻译： 一种显示装置的焊盘结构。 第一导电层形成在衬底上，覆盖衬底和第一导电层形成保护层，并且形成覆盖保护层的第二导电层。 开口结构穿透第二导电层和保护层以暴露第一导电层。 形成第三导电层，覆盖第二导电层以接触开口结构的侧壁和底部。 因此，第三导电层电连接到第二导电层以提供第一电连接路径，并且第三导电层电连接到第一导电层以提供第二电连接路径。