-
公开(公告)号：US10659075B2
公开(公告)日：2020-05-19
申请号：US16297571
申请日：2019-03-08
Applicant: Hypres, Inc.
Inventor： Amol Inamdar , Deepnarayan Gupta
Abstract: Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.
-
公开(公告)号：US10348343B1
公开(公告)日：2019-07-09
申请号：US16186288
申请日：2018-11-09
Applicant: Hypres, Inc.
Inventor： Deepnarayan Gupta , Amol Inamdar
Abstract: A system and method for receiving a signal, comprising an input adapted to receive a radio frequency signal having a strong interferer; a signal generator, adapted to produce a representation of the interferer as an analog signal generated based on an oversampled digital representation thereof; and a component adapted to cancel the strong interferer from radio frequency signal based on the generated analog signal to produce a modified radio frequency signal substantially absent the interferer. The system typically has a nonlinear component that either saturates or produces distortion from the strong interferer, which is thereby reduced. The system preferably employs high speed circuits which digitize and process radio frequency signals without analog mixers.
-
公开(公告)号：US09661596B2
公开(公告)日：2017-05-23
申请号：US14449643
申请日：2014-08-01
Applicant: Hypres Inc.
Inventor： Deepnarayan Gupta
CPC classification number: H04W56/0015 , H04B1/005 , H04B1/0483 , H04B1/40
Abstract: A system and method for receiving a radio frequency signal, comprising a device for digitizing, without prior alteration of frequency, an analog radio frequency representation of each of a plurality of radio frequency signals to produce a respective plurality of digital radio frequency signals having a respective associated radio frequency digital clock, the plurality of digital radio frequency signals having a sufficiently high respective associated clock rate to preserve an information content of an information communication present in the analog radio frequency representation; a switch matrix adapted to concurrently switch the plurality of digital radio frequency signals and associated digital radio frequency clock to ones of a plurality of digital signal processors; and a control adapted to selectively automatically control the concurrent switching of a plurality of digital signals and associated digital clock to the respective plurality of digital signal processors; wherein the digital signal processors produce processed representations of information contained in respective analog radio frequency representations.
-
公开(公告)号：US09548878B2
公开(公告)日：2017-01-17
申请号：US14519197
申请日：2014-10-21
Applicant: Hypres Inc.
Inventor： Deepnarayan Gupta , Oleg Mukhanov
IPC: H04B10/00 , H04L27/20 , H04B10/2575 , H04B10/69
CPC classification number: H04B10/25752 , H04B10/2575 , H04B10/40 , H04B10/5561 , H04B10/697 , H04L27/2096
Abstract: A transceiver architecture for wireless base stations wherein a broadband radio frequency signal is carried between at least one tower-mounted unit and a ground-based unit via optical fibers, or other non-distortive media, in either digital or analog format. Each tower-mounted unit (for both reception and transmission) has an antenna, analog amplifier and an electro-optical converter. The ground unit has ultrafast data converters and digital frequency translators, as well as signal linearizers, to compensate for nonlinear distortion in the amplifiers and optical links in both directions. In one embodiment of the invention, at least one of the digital data converters, frequency translators, and linearizers includes superconducting elements mounted on a cryocooler.
Abstract translation: 一种用于无线基站的收发机架构，其中宽带射频信号通过光纤或数字或模拟格式的光纤或其他非失真媒介在至少一个塔式安装单元和基于地面的单元之间承载。 每个塔式装置（用于接收和传输）都具有天线，模拟放大器和电光转换器。 地面单元具有超快数据转换器和数字频率转换器以及信号线性化器，以补偿放大器和光学链路在两个方向上的非线性失真。 在本发明的一个实施例中，至少一个数字数据转换器，频率转换器和线性化器包括安装在低温冷却器上的超导元件。
-
公开(公告)号：US09312878B1
公开(公告)日：2016-04-12
申请号：US14522842
申请日：2014-10-24
Applicant: Hypres, Inc.
Inventor： Amol Inamdar , Deepnarayan Gupta
CPC classification number: H03M3/458 , H03M1/0854 , H03M1/12 , H03M1/1245 , H03M1/68 , H03M3/02 , H03M3/46
Abstract: Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.
Abstract translation: 超导体模数转换器（ADC）具有高灵敏度和大动态范围。 进一步增加动态范围的一种方法是使用子架构，由此将粗略ADC的输出转换回模拟并从输入信号中减去，并将剩余信号馈送到精细ADC以产生额外的有效位。 这也需要高增益宽带线性放大器，这在超导体技术中通常不可用。 在优选实施例中，提出了分布式数字通量放大器，其还集成了积分，滤波和磁通减法的功能。 子阵列ADC设计提供了两个与物理放大器和减法器电路连接的ADC，可提供大约30-35 dB的动态范围扩展。
-
Patent Agency Ranking
公开(公告)号：US10230389B1
公开(公告)日：2019-03-12
申请号：US15679829
申请日：2017-08-17
Applicant: Hypres, Inc.
Inventor： Amol Inamdar , Deepnarayan Gupta
Abstract: Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.
-
公开(公告)号：US09838051B1
公开(公告)日：2017-12-05
申请号：US15095768
申请日：2016-04-11
Applicant: Hypres, Inc.
Inventor： Deepnarayan Gupta , Amol Inamdar
CPC classification number: H04B1/10 , H04B1/109 , H04B1/525 , H04B7/15585 , H04L27/01
Abstract: A radio frequency receiver subject to a large in-band interferor employs active cancellation with coarse and at least one fine cancellation signal, each with a respective radio frequency combiner, in order to increase the effective dynamic range of the receiver for weak signals of interest. One or both can be digitally synthesized. This is particularly applicable for co-site interference, whereby the interfering transmit signal is directly accessible. A similar system and method may also be applied to external interferors such as those produced by deliberate or unintentional jamming signals, or by strong multipath signals. An adaptive algorithm may be used for dynamic delay and gain matching. In a preferred embodiment, a hybrid technology hybrid temperature system incorporates both superconducting and semiconducting components to achieve enhanced broadband performance.
-
公开(公告)号：US09742429B1
公开(公告)日：2017-08-22
申请号：US15095730
申请日：2016-04-11
Applicant: Hypres, Inc.
Inventor： Amol Inamdar , Deepnarayan Gupta
CPC classification number: H03M3/458 , H03M1/0854 , H03M1/12 , H03M1/1245 , H03M1/68 , H03M3/02 , H03M3/46
Abstract: Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.
-
公开(公告)号：US20170134091A1
公开(公告)日：2017-05-11
申请号：US15404950
申请日：2017-01-12
Applicant: Hypres, Inc.
Inventor： Deepnarayan Gupta , Oleg Mukhanov
IPC: H04B10/2575 , H04B10/556 , H04B10/40 , H04L27/20 , H04B10/69
CPC classification number: H04B10/25752 , H04B10/2575 , H04B10/40 , H04B10/5561 , H04B10/697 , H04L27/2096
Abstract: A transceiver architecture for wireless base stations wherein a broadband radio frequency signal is carried between at least one tower-mounted unit and a ground-based unit via optical fibers, or other non-distortive media, in either digital or analog format. Each tower-mounted unit (for both reception and transmission) has an antenna, analog amplifier and an electro-optical converter. The ground unit has ultrafast data converters and digital frequency translators, as well as signal linearizers, to compensate for nonlinear distortion in the amplifiers and optical links in both directions. In one embodiment of the invention, at least one of the digital data converters, frequency translators, and linearizers includes superconducting elements mounted on a cryocooler.
-
公开(公告)号：US20160197628A1
公开(公告)日：2016-07-07
申请号：US15010975
申请日：2016-01-29
Applicant: Hypres, Inc.
Inventor： Deepnarayan Gupta
CPC classification number: H04B1/123 , H04B1/0028 , H04B1/109 , H04B1/38 , H04L27/2649
Abstract: A processor, comprising a first data input configured to receive a stream of samples of a first signal having a spectral space, the stream having a data rate of at least 4 GHz; a second data input configured to receive a stream of samples of a second signal; a multitap correlator, configured to receive the first stream of samples and the second stream of samples, and producing at least one correlation output for each respective sequential sample of the first signal received; and a programmable control configured to alter a relationship of the stream of samples of the first signal and the stream of samples of the second signal, to thereby select, under program control, an alterable correlation output.
-
-
-
-
-
-
-
-
-
Search Results
36
records
(took 0.023 seconds)
