POLYSILICON THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    1.
    发明申请
    POLYSILICON THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    多晶硅薄膜晶体管阵列及其制造方法

    公开(公告)号:US20080115718A1

    公开(公告)日:2008-05-22

    申请号:US11866617

    申请日:2007-10-03

    IPC分类号: C30B28/08 B32B3/10

    摘要: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.

    摘要翻译: 提供一种制造薄膜晶体管阵列面板的方法,其包括:在绝缘衬底上沉积非晶硅层; 通过使用掩模的多个激光照射将非晶硅层转化为多晶硅层; 在所述多晶硅层上形成栅极绝缘层; 在所述栅极绝缘层上形成多个栅极线; 在栅极线上形成第一层间绝缘层; 在所述第一层间绝缘层上形成多条数据线; 在数据线上形成第二层间绝缘层; 以及在所述第二层间绝缘层上形成多个像素电极,其中所述掩模包括以混合方式布置的多个透射区域和多个阻挡区域。

    Polysilicon thin film transistor array panel and manufacturing method thereof
    2.
    发明授权
    Polysilicon thin film transistor array panel and manufacturing method thereof 有权
    多晶硅薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US09005697B2

    公开(公告)日:2015-04-14

    申请号:US11866617

    申请日:2007-10-03

    摘要: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.

    摘要翻译: 提供一种制造薄膜晶体管阵列面板的方法,其包括:在绝缘衬底上沉积非晶硅层; 通过使用掩模的多个激光照射将非晶硅层转化为多晶硅层; 在所述多晶硅层上形成栅极绝缘层; 在所述栅极绝缘层上形成多个栅极线; 在栅极线上形成第一层间绝缘层; 在所述第一层间绝缘层上形成多条数据线; 在数据线上形成第二层间绝缘层; 以及在所述第二层间绝缘层上形成多个像素电极,其中所述掩模包括以混合方式布置的多个透射区域和多个阻挡区域。

    Polysilicon thin film transistor array panel and manufacturing method thereof
    4.
    发明授权
    Polysilicon thin film transistor array panel and manufacturing method thereof 有权
    多晶硅薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US07294857B2

    公开(公告)日:2007-11-13

    申请号:US11048726

    申请日:2005-02-03

    IPC分类号: H01L29/04

    摘要: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.

    摘要翻译: 提供一种制造薄膜晶体管阵列面板的方法,其包括:在绝缘衬底上沉积非晶硅层; 通过使用掩模的多个激光照射将非晶硅层转化为多晶硅层; 在所述多晶硅层上形成栅极绝缘层; 在所述栅极绝缘层上形成多个栅极线; 在所述栅极线上形成第一层间绝缘层; 在所述第一层间绝缘层上形成多条数据线; 在数据线上形成第二层间绝缘层; 以及在所述第二层间绝缘层上形成多个像素电极,其中所述掩模包括以混合方式布置的多个透射区域和多个阻挡区域。

    Thin film transistor array panel
    9.
    发明授权
    Thin film transistor array panel 有权
    薄膜晶体管阵列面板

    公开(公告)号:US07164153B2

    公开(公告)日:2007-01-16

    申请号:US10521345

    申请日:2003-11-04

    IPC分类号: H01L29/04

    摘要: A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.

    摘要翻译: 提供一种薄膜晶体管阵列面板,其包括:包括多个像素区域的基板; 半导体层,形成在所述基板上,并且在各像素区域中包括多对第一和第二半导体部分; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅极线; 形成在栅极线上的第二绝缘层; 形成在所述第二绝缘层上的数据线; 形成在数据线上的第三绝缘层; 形成在第三绝缘层上并连接到数据线的像素电极,其中第一和第二半导体部分中的至少一个的宽度和长度在至少两个像素区域之间变化。

    Thin film transistor array panel
    10.
    发明申请
    Thin film transistor array panel 有权
    薄膜晶体管阵列面板

    公开(公告)号:US20060102902A1

    公开(公告)日:2006-05-18

    申请号:US10521345

    申请日:2003-11-04

    IPC分类号: H01L29/76

    摘要: A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.

    摘要翻译: 提供一种薄膜晶体管阵列面板,其包括:包括多个像素区域的基板; 半导体层,形成在所述基板上,并且在各像素区域中包括多对第一和第二半导体部分; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅极线; 形成在栅极线上的第二绝缘层; 形成在所述第二绝缘层上的数据线; 形成在数据线上的第三绝缘层; 形成在第三绝缘层上并连接到数据线的像素电极,其中第一和第二半导体部分中的至少一个的宽度和长度在至少两个像素区域之间变化。