公开(公告)号：US20140360767A1

公开(公告)日：2014-12-11

申请号：US14294588

申请日：2014-06-03

Applicant: IBIDEN CO., LTD.

Inventor： Makoto TERUI ,  Masatoshi KUNIEDA ,  Yoshinori SHIZUNO ,  Asuka Il

IPC: H05K1/11 ,  H05K3/12

CPC classification number: H01L24/19 ,  H01L23/49816 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/09136 ,  H05K2201/10159 ,  H01L2924/00

Abstract: A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer and including first mounting pads positioned to mount a semiconductor element, a wiring structure positioned in the first insulation layer and including a second insulation layer, second conductive patterns formed on the second insulation layer, and second mounting pads connected to the second conductive patterns, and third mounting pads formed on the first insulation layer above the second mounting pads and connected to the second mounting pads such that the third mounting pads are positioned to mount the semiconductor element and are set off from the second mounting pads toward the semiconductor element.

Abstract translation: 布线板包括第一绝缘层，形成在第一绝缘层上的第一导电图案，并且包括定位成安装半导体元件的第一安装焊盘，位于第一绝缘层中并包括第二绝缘层的布线结构，形成第二导电图案 在第二绝缘层上，以及连接到第二导电图案的第二安装焊盘以及形成在第二安装焊盘上方的第一绝缘层上并连接到第二安装焊盘的第三安装焊盘，使得第三安装焊盘被定位成安装 半导体元件并且从第二安装焊盘朝向半导体元件脱离。

公开(公告)号：US20140360759A1

公开(公告)日：2014-12-11

申请号：US14294534

申请日：2014-06-03

Applicant: IBIDEN CO., LTD.

Inventor： Masatoshi Kunieda ,  Makoto Terui ,  Asuka Il ,  Yoshinori Shizuno

IPC: H01L23/48

CPC classification number: H01L23/5381 ,  H01L21/4846 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2924/12042 ,  H01L2924/1436 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2924/00

Abstract: A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer and including first mounting pads positioned to mount a semiconductor element, a wiring structure positioned in the first insulation layer and having a second insulation layer, second conductive patterns formed on the second insulation layer, and second mounting pads connected to the second conductive patterns, and third mounting pads formed on the first insulation layer above the second mounting pads and connected to the second mounting pads such that the third mounting pads are positioned to mount the semiconductor element and form a distance between adjacent first and third mounting pads which is greater than a distance between adjacent first mounting pads.

Abstract translation: 布线板包括第一绝缘层，形成在第一绝缘层上的第一导电图案，并且包括定位成安装半导体元件的第一安装焊盘，位于第一绝缘层中并具有第二绝缘层的布线结构，形成第二导电图案 在第二绝缘层上，以及连接到第二导电图案的第二安装焊盘以及形成在第二安装焊盘上方的第一绝缘层上并连接到第二安装焊盘的第三安装焊盘，使得第三安装焊盘被定位成安装 形成相邻的第一和第三安装焊盘之间的距离，其大于相邻的第一安装焊盘之间的距离。

公开(公告)号：US09431347B2

公开(公告)日：2016-08-30

申请号：US14294534

申请日：2014-06-03

Applicant: IBIDEN CO., LTD.

Inventor： Masatoshi Kunieda ,  Makoto Terui ,  Asuka Il ,  Yoshinori Shizuno

IPC: H05K1/11 ,  H01L23/538 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L23/5381 ,  H01L21/4846 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2924/12042 ,  H01L2924/1436 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2924/00

Abstract: A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer and including first mounting pads positioned to mount a semiconductor element, a wiring structure positioned in the first insulation layer and having a second insulation layer, second conductive patterns formed on the second insulation layer, and second mounting pads connected to the second conductive patterns, and third mounting pads formed on the first insulation layer above the second mounting pads and connected to the second mounting pads such that the third mounting pads are positioned to mount the semiconductor element and form a distance between adjacent first and third mounting pads which is greater than a distance between adjacent first mounting pads.

Abstract translation: 布线板包括第一绝缘层，形成在第一绝缘层上的第一导电图案，并且包括定位成安装半导体元件的第一安装焊盘，位于第一绝缘层中并具有第二绝缘层的布线结构，形成第二导电图案 在第二绝缘层上，以及连接到第二导电图案的第二安装焊盘以及形成在第二安装焊盘上方的第一绝缘层上并连接到第二安装焊盘的第三安装焊盘，使得第三安装焊盘被定位成安装 形成相邻的第一和第三安装焊盘之间的距离，其大于相邻的第一安装焊盘之间的距离。

公开(公告)号：US09425159B2

公开(公告)日：2016-08-23

申请号：US14294588

申请日：2014-06-03

Applicant: IBIDEN CO., LTD.

Inventor： Makoto Terui ,  Masatoshi Kunieda ,  Yoshinori Shizuno ,  Asuka Il

IPC: H05K1/11 ,  H01L23/00 ,  H05K3/46 ,  H01L23/538 ,  H01L23/498

CPC classification number: H01L24/19 ,  H01L23/49816 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/09136 ,  H05K2201/10159 ,  H01L2924/00

Abstract: A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer and including first mounting pads positioned to mount a semiconductor element, a wiring structure positioned in the first insulation layer and including a second insulation layer, second conductive patterns formed on the second insulation layer, and second mounting pads connected to the second conductive patterns, and third mounting pads formed on the first insulation layer above the second mounting pads and connected to the second mounting pads such that the third mounting pads are positioned to mount the semiconductor element and are set off from the second mounting pads toward the semiconductor element.

Abstract translation: 布线板包括第一绝缘层，形成在第一绝缘层上的第一导电图案，并且包括定位成安装半导体元件的第一安装焊盘，位于第一绝缘层中并包括第二绝缘层的布线结构，形成第二导电图案 在第二绝缘层上，以及连接到第二导电图案的第二安装焊盘以及形成在第二安装焊盘上方的第一绝缘层上并连接到第二安装焊盘的第三安装焊盘，使得第三安装焊盘被定位成安装 半导体元件并且从第二安装焊盘朝向半导体元件脱离。

公开(公告)号：US20140311780A1

公开(公告)日：2014-10-23

申请号：US14259522

申请日：2014-04-23

Applicant: IBIDEN CO., LTD.

Inventor： Yoshinori SHIZUNO ,  Makoto TERUI ,  Masatoshi KUNIEDA ,  Asuka Il

IPC: H05K1/02 ,  H05K3/00

CPC classification number: H05K1/0269 ,  H05K3/4644 ,  H05K2201/09918 ,  H05K2203/166

Abstract: An electronic component includes an insulation layer, an alignment mark positioned on a first surface of the insulation layer, and an adhesive layer including an optically opaque agent and formed on the first surface of the insulation layer or a second surface of the insulation layer on the opposite side with respect to the first surface of the insulation layer. The adhesive layer has an opening portion formed at the position corresponding to the alignment mark such that the opening portion exposes the alignment mark directly or through the insulation layer.

Abstract translation: 电子部件包括绝缘层，定位在绝缘层的第一表面上的对准标记，以及包含光不透明剂的粘合剂层，形成在绝缘层的第一表面或绝缘层的第二表面上 相对于绝缘层的第一表面的相对侧。 粘合剂层具有形成在与对准标记对应的位置处的开口部分，使得开口部分直接或通过绝缘层露出对准标记。