公开(公告)号：US3625781A

公开(公告)日：1971-12-07

申请号：US3625781D

申请日：1969-05-09

Applicant: IBM

Inventor： JOSHI MADHUKAR L ,  MASTERS BURTON J ,  VIVA OSVALDO R ,  YEH TSU-HSING

IPC: H01L29/73 ,  H01L21/00 ,  H01L21/331 ,  H01L21/8222 ,  H01L29/167 ,  H01L7/44

CPC classification number: H01L29/167 ,  H01L21/00 ,  H01L21/8222 ,  Y10S118/90 ,  Y10S148/037 ,  Y10S148/062 ,  Y10S148/085 ,  Y10S148/151

Abstract: A method of fabricating high-speed planar transistor structures by reducing carrier lifetime through doping with carrier lifetime killers. Gold is diffused through the front surface of the silicon structure during transistor fabrication. The gold is introduced from the vapor phase in a controlled manner so that its solid solubility in silicon is not exceeded. A simultaneous gold and base diffusion is preferred. Such a simultaneous diffusion produces a novel planar transistor structure having a gold distribution curve with an unexpected increased concentration peak in the region proximate to the basecollector junction.

公开(公告)号：US3925106A

公开(公告)日：1975-12-09

申请号：US42853773

申请日：1973-12-26

Applicant: IBM

Inventor： KU SAN-MEI ,  MASTERS BURTON J

IPC: H01L27/04 ,  H01L21/00 ,  H01L21/265 ,  H01L21/822 ,  H01L29/66 ,  H01L29/8605 ,  H01L7/44

CPC classification number: H01L29/8605 ,  H01L21/00 ,  Y10S148/024 ,  Y10S438/934

Abstract: A method for producing integrated circuit resistors of relatively high resistivity which are temperature stable, i.e., have a low temperature coefficient of resistance at operating temperatures. The resistor is formed in a selected region of an integrated circuit substrate through the introduction of appropriate dopant ions by standard ion implantation or diffusion techniques. However, the concentration of such introduced dopant ions is in excess of the concentration ordinarily required by such techniques. The region into which such dopant ions are introduced is subjected to a bombardment with non-dopant ions at a dose which is sufficient to damage the crystal structure of the region but insufficient to form an amorphous phase in this bombarded region; the bombardment may be carried out either before, after or, where appropriate, even simultaneously with the introduction of the dopant ions. As a result of this ion bombardment, the sheet resistance of the resistor region becomes substantially higher than the selected resistance despite the presence of excess dopant ions. Then, the substrate is heated at a temperature of from 500*C. to 800*C. for a time sufficient to partially anneal the damage so as to lower the sheet resistance of the region to the selected sheet resistance. The annealing time/temperature cycle is carried out so as to maintain the temperature coefficient of resistance below the temperature coefficient of resistance for conventional high resistivity resistors produced by ion implantation or diffusion.