公开(公告)号：US11737371B2

公开(公告)日：2023-08-22

申请号：US17079264

申请日：2020-10-23

Applicant: IMEC vzw

Inventor： Sebastien Couet ,  Siddharth Rao ,  Robert Carpenter

IPC: H10N50/80 ,  H10B61/00 ,  H10N50/85

CPC classification number: H10N50/80 ,  H10B61/00 ,  H10N50/85

Abstract: The disclosed technology relates generally to a magnetic device and more particularly to a spintronic device comprising a tunnel barrier, a hybrid storage layer on the tunnel barrier and a metal layer on the hybrid storage layer. The hybrid storage layer comprises a first magnetic layer, a spacer layer on the first magnetic layer and at least one further magnetic layer on the spacer layer and exchange coupled to the first magnetic layer via the spacer layer.

公开(公告)号：US20240290368A1

公开(公告)日：2024-08-29

申请号：US18587140

申请日：2024-02-26

Applicant: IMEC VZW

Inventor： Sofie Mertens ,  Kiroubanand Sankaran ,  Xiaoyu Piao ,  Robert Carpenter

IPC: G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

CPC classification number: G11C11/161 ,  H01F10/3272 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

Abstract: The disclosed technology generally relates to a stack for a magnetic random access memory device, for example, a stack including a magnetic tunnel junction with a high tunneling magnetoresistance ratio. In one aspect, the stack includes a substrate layer, a first electrode layer arranged on the substrate layer, and seed metal layer arranged on the first electrode layer, each layer having a [001] or [010] or [100] in-plane texture. The stack further includes a magnetic free layer arranged on the seed metal layer, a crystalline tunnel barrier layer arranged on the free layer, a magnetic reference layer arranged on the crystalline tunnel barrier layer, a pinning layer arranged on the reference layer, and a second electrode layer arranged on the pinning layer.

公开(公告)号：US20230178131A1

公开(公告)日：2023-06-08

申请号：US18062785

申请日：2022-12-07

Applicant: IMEC VZW

Inventor： Robert Carpenter ,  Woojim Kim ,  Kiroubanand Sankaran

IPC: G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/85 ,  H10N50/10

CPC classification number: G11C11/161 ,  H01F10/3286 ,  H01L27/222 ,  H01L43/10 ,  H01L43/08

Abstract: The present disclosure provides improved VCMA MRAM devices that include an engineered magnetic structure. The disclosure also presents the engineered magnetic structure, which includes a magnetic reference layer, a tunnel barrier layer provided on the magnetic reference layer, an interface layer provided on the tunnel barrier layer, a magnetic free layer provided on the interface layer, and a cap layer provided on the magnetic free layer. The interface layer and the cap layer are engineered to enhance an orbital occupancy and/or a spin-orbit-coupling of the magnetic free layer.

公开(公告)号：US11810702B2

公开(公告)日：2023-11-07

申请号：US17115578

申请日：2020-12-08

Applicant: IMEC vzw

Inventor： Robert Carpenter ,  Johan Swerts

IPC: H01F10/32 ,  G11C11/16 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85

CPC classification number: H01F10/3254 ,  G11C11/161 ,  H01F10/3272 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85

Abstract: The disclosed technology relates generally to the field of magnetic devices, in particular to magnetic memory devices or logic devices. The disclosed technology presents a magnetic structure for a magnetic device, wherein the magnetic structure comprises a magnetic reference layer (RL); a spacer provided on the magnetic RL, the spacer comprising a first texture breaking layer provided on the magnetic RL, a magnetic bridge layer provided on the first texture breaking layer, and a second texture breaking layer provided on the magnetic bridge layer. Further, the magnetic structure comprising a magnetic pinned layer (PL) or hard layer (HL) provided on the spacer, wherein the magnetic RL and the magnetic PL or HL are magnetically coupled across the spacer through direct exchange interaction.

公开(公告)号：US20210183557A1

公开(公告)日：2021-06-17

申请号：US17115578

申请日：2020-12-08

Applicant: IMEC vzw

Inventor： Robert Carpenter ,  Johan Swerts

IPC: H01F10/32 ,  H01L43/08 ,  H01L43/10 ,  H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  G11C11/16

Abstract: The disclosed technology relates generally to the field of magnetic devices, in particular to magnetic memory devices or logic devices. The disclosed technology presents a magnetic structure for a magnetic device, wherein the magnetic structure comprises a magnetic reference layer (RL); a spacer provided on the magnetic RL, the spacer comprising a first texture breaking layer provided on the magnetic RL, a magnetic bridge layer provided on the first texture breaking layer, and a second texture breaking layer provided on the magnetic bridge layer. Further, the magnetic structure comprising a magnetic pinned layer (PL) or hard layer (HL) provided on the spacer, wherein the magnetic RL and the magnetic PL or HL are magnetically coupled across the spacer through direct exchange interaction.

公开(公告)号：US20210126190A1

公开(公告)日：2021-04-29

申请号：US17079264

申请日：2020-10-23

Applicant: IMEC vzw

Inventor： Sebastien Couet ,  Siddharth Rao ,  Robert Carpenter

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/10

Abstract: The disclosed technology relates generally to a magnetic device and more particularly to a spintronic device comprising a tunnel barrier, a hybrid storage layer on the tunnel barrier and a metal layer on the hybrid storage layer. The hybrid storage layer comprises a first magnetic layer, a spacer layer on the first magnetic layer and at least one further magnetic layer on the spacer layer and exchange coupled to the first magnetic layer via the spacer layer.