公开(公告)号：US20140151789A1

公开(公告)日：2014-06-05

申请号：US13690328

申请日：2012-11-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Maria Cotorogea ,  Hans Peter Felsl ,  Yvonne Gawlina ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze ,  Georg Seibert ,  Andre Rainer Stegner ,  Wolfgang Wagner

IPC: H01L27/088 ,  H01L21/8234

CPC classification number: H01L27/088 ,  H01L21/823481 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7813

Abstract: A semiconductor device includes a first transistor cell including a first gate electrode in a first trench. The semiconductor device further includes a second transistor cell including a second gate electrode in a second trench, wherein the first and second gate electrodes are electrically connected. The semiconductor device further includes a third trench between the first and second trenches, wherein the third trench extends deeper into a semiconductor body from a first side of the semiconductor body than the first and second trenches. The semiconductor device further includes a dielectric in the third trench covering a bottom side and walls of the third trench.

Abstract translation: 半导体器件包括在第一沟槽中包括第一栅电极的第一晶体管单元。 半导体器件还包括在第二沟槽中包括第二栅电极的第二晶体管单元，其中第一和第二栅极电连接。 半导体器件还包括在第一和第二沟槽之间的第三沟槽，其中第三沟槽从半导体本体的第一侧比第一和第二沟槽更深地延伸到半导体本体中。 半导体器件还包括覆盖第三沟槽的底侧和第三沟槽壁的第三沟槽中的电介质。

公开(公告)号：US08853774B2

公开(公告)日：2014-10-07

申请号：US13690328

申请日：2012-11-30

Applicant: Infineon Technologies AG

Inventor： Maria Cotorogea ,  Hans Peter Felsl ,  Yvonne Gawlina ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze ,  Georg Seibert ,  Andre Rainer Stegner ,  Wolfgang Wagner

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088

CPC classification number: H01L27/088 ,  H01L21/823481 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7813

Abstract: A semiconductor device includes a first transistor cell including a first gate electrode in a first trench. The semiconductor device further includes a second transistor cell including a second gate electrode in a second trench, wherein the first and second gate electrodes are electrically connected. The semiconductor device further includes a third trench between the first and second trenches, wherein the third trench extends deeper into a semiconductor body from a first side of the semiconductor body than the first and second trenches. The semiconductor device further includes a dielectric in the third trench covering a bottom side and walls of the third trench.

Abstract translation: 半导体器件包括在第一沟槽中包括第一栅电极的第一晶体管单元。 半导体器件还包括在第二沟槽中包括第二栅电极的第二晶体管单元，其中第一和第二栅极电连接。 半导体器件还包括在第一和第二沟槽之间的第三沟槽，其中第三沟槽从半导体本体的第一侧比第一和第二沟槽更深地延伸到半导体本体中。 半导体器件还包括覆盖第三沟槽的底侧和第三沟槽壁的第三沟槽中的电介质。