公开(公告)号：US09711393B2

公开(公告)日：2017-07-18

申请号：US14819520

申请日：2015-08-06

Applicant: Infineon Technologies Dresden GMBH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt

IPC: H01L29/06 ,  H01L21/764 ,  H01L21/762 ,  H01L27/12 ,  H01L21/324 ,  H01L29/78 ,  B81C1/00

CPC classification number: H01L21/764 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C2201/0116 ,  H01L21/3247 ,  H01L21/7624 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/7833

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.

公开(公告)号：US20170092659A1

公开(公告)日：2017-03-30

申请号：US15375277

申请日：2016-12-12

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt ,  Franz Hirler ,  Anton Mauder ,  Wolfgang Scholz ,  Hans-Joachim Schulze ,  Francisco Javier Santos Rodriguez

IPC: H01L27/12 ,  H01L21/8234 ,  H01L21/762 ,  H01L21/768

CPC classification number: H01L27/1207 ,  H01L21/761 ,  H01L21/76283 ,  H01L21/764 ,  H01L21/76895 ,  H01L21/823487 ,  H01L29/7397 ,  H01L29/7813 ,  H05K1/0256 ,  H05K1/0284 ,  H05K1/183 ,  H05K3/30 ,  H05K2201/10522 ,  Y10T29/4913

Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

公开(公告)号：US09564550B2

公开(公告)日：2017-02-07

申请号：US14064302

申请日：2013-10-28

Applicant: Infineon Technologies Dresden GmbH

Inventor： Alessia Scire ,  Dieter Kaiser ,  Tarja Hauck ,  Frank Zschorlich

IPC: H01L31/16 ,  H01L27/28 ,  H01L51/52

CPC classification number: H01L51/56 ,  H01L27/288 ,  H01L27/3276 ,  H01L31/0224 ,  H01L31/02327 ,  H01L31/16 ,  H01L51/5275

Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.

Abstract translation: 根据各种实施例，可以提供光电子部件，所述光电子部件包括：设置在载体中的至少一个和载体中的至少一个的电极结构; 以及设置在所述电极结构上的光栅结构，所述光栅结构至少包括第一区域和第二区域，其中所述光栅结构的所述第一区域包括非晶硅; 并且其中所述光栅结构的第二区域包括具有与所述非晶硅的折射率不同的折射率的材料。

公开(公告)号：US20150340268A1

公开(公告)日：2015-11-26

申请号：US14819520

申请日：2015-08-06

Applicant: Infineon Technologies Dresden GMBH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt

IPC: H01L21/764 ,  H01L29/06 ,  H01L27/12 ,  H01L21/762

CPC classification number: H01L21/764 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C2201/0116 ,  H01L21/3247 ,  H01L21/7624 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/7833

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.

Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在衬底内形成第一空腔。 第一空腔设置在基板的一部分下方。 该方法还包括在第一腔内形成第一支柱以支撑衬底的该部分。

公开(公告)号：US10354911B2

公开(公告)日：2019-07-16

申请号：US15630579

申请日：2017-06-22

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt

IPC: H01L21/764 ,  H01L21/762 ,  H01L27/12 ,  H01L21/324 ,  H01L29/78 ,  H01L29/06 ,  B81C1/00

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.

公开(公告)号：US20180175069A1

公开(公告)日：2018-06-21

申请号：US15899437

申请日：2018-02-20

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt ,  Franz Hirler ,  Anton Mauder ,  Wolfgang Scholz ,  Hans-Joachim Schulze ,  Francisco Javier Santos Rodriguez

IPC: H01L27/12 ,  H01L21/8234 ,  H01L21/768 ,  H01L21/762 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L27/1207 ,  H01L21/761 ,  H01L21/76283 ,  H01L21/764 ,  H01L21/76895 ,  H01L21/823487 ,  H01L29/7397 ,  H01L29/7813 ,  H05K1/0256 ,  H05K1/0284 ,  H05K1/183 ,  H05K3/30 ,  H05K2201/10522 ,  Y10T29/4913

Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

公开(公告)号：US09911946B2

公开(公告)日：2018-03-06

申请号：US15387772

申请日：2016-12-22

Applicant: Infineon Technologies Dresden GmbH

Inventor： Alessia Scire ,  Dieter Kaiser ,  Tarja Hauck ,  Frank Zschorlich

IPC: H01L51/56 ,  H01L51/52 ,  H01L27/32

CPC classification number: H01L51/56 ,  H01L27/288 ,  H01L27/3276 ,  H01L31/0224 ,  H01L31/02327 ,  H01L31/16 ,  H01L51/5275

Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.

公开(公告)号：US20150163915A1

公开(公告)日：2015-06-11

申请号：US14098591

申请日：2013-12-06

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt ,  Franz Hirler ,  Anton Mauder ,  Wolfgang Scholz ,  Hans-Joachim Schulze ,  Francisco Javier Santos Rodriguez

IPC: H05K1/18 ,  H05K3/30 ,  H05K1/02

CPC classification number: H01L27/1207 ,  H01L21/761 ,  H01L21/76283 ,  H01L21/764 ,  H01L21/76895 ,  H01L21/823487 ,  H01L29/7397 ,  H01L29/7813 ,  H05K1/0256 ,  H05K1/0284 ,  H05K1/183 ,  H05K3/30 ,  H05K2201/10522 ,  Y10T29/4913

Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

Abstract translation: 根据各种实施例，电子设备可以包括载体，其包括至少第一区域和彼此横向相邻的第二区域; 布置在所述载体的所述第一区域中的电绝缘结构，其中所述载体的所述第二区域没有所述电绝缘结构; 布置在电绝缘结构上的载体的第一区域中的第一电子部件; 布置在所述载体的第二区域中的第二电子部件; 其中所述电绝缘结构包括一个或多个中空室，其中所述一个或多个中空室的侧壁被电绝缘材料覆盖。

公开(公告)号：US09938133B2

公开(公告)日：2018-04-10

申请号：US15097808

申请日：2016-04-13

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Mohsin Nawaz ,  Alfons Dehe ,  Heiko Froehlich ,  Alessia Scire ,  Steffen Bieselt

IPC: G01L9/00 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0021 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/0136 ,  B81C1/00166 ,  B81C1/00182 ,  B81C2201/013

Abstract: According to an embodiment, a method of forming a MEMS transducer includes forming a transducer frame in a layer of monocrystalline silicon, where forming the transducer frame includes forming a support portion adjacent a cavity and forming a first set of comb-fingers extending from the support portion. The method of forming a MEMS transducer further includes forming a spring support from an anchor to the support portion and forming a second set of comb-fingers in the layer of monocrystalline silicon. The second set of comb-fingers is interdigitated with the first set of comb-fingers.

公开(公告)号：US09896329B2

公开(公告)日：2018-02-20

申请号：US15208975

申请日：2016-07-13

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Heiko Froehlich ,  Alessia Scire ,  Maik Stegemann ,  Bernhard Winkler ,  Andre Roeth ,  Steffen Bieselt ,  Mirko Vogt

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81C1/0015 ,  B81B3/0078 ,  B81B2201/0235 ,  B81B2203/0118 ,  B81B2203/0163

Abstract: The present disclosure relates to an integrated semiconductor device, comprising a semiconductor substrate; a cavity formed into the semiconductor substrate; a sensor portion of the semiconductor substrate deflectably suspended in the cavity at one side of the cavity via a suspension portion of the semiconductor substrate interconnecting the semiconductor substrate and the sensor portion thereof, wherein an extension of the suspension portion along the side of the cavity is smaller than an extension of said side of the cavity.