公开(公告)号：US10904161B2

公开(公告)日：2021-01-26

申请号：US16218262

申请日：2018-12-12

Applicant: Intel Corporation

Inventor： Ren Wang ,  Ahmad A. Samih ,  Christian Maciocco ,  Andrew Brown ,  Tsung-Yuan C. Tai

IPC: H04L12/801 ,  H04L12/24 ,  H04L5/14 ,  H04W84/18 ,  H04L12/927 ,  H04L12/725 ,  H04L12/931 ,  H04L12/863 ,  H04L12/851 ,  H04L12/841

Abstract: Embodiments of the present disclosure describe methods, apparatuses, storage media, and systems for routing data packets in a quality of service (QoS) enabled content-based network or interconnect fabric. Various embodiments describe how to manage data flow based on content-based attribute vectors (AVs) indicating QoS requirements with respect to the data packets in networking or platform interconnects. A dynamic scheduling based on AV information may improve trafficking efficiency and optimize system performance.

公开(公告)号：US09418024B2

公开(公告)日：2016-08-16

申请号：US14039424

申请日：2013-09-27

Applicant: INTEL CORPORATION

Inventor： Ahmad A. Samih ,  Shadi T. Khasawneh

IPC: G06F12/00 ,  G06F13/16 ,  G06F12/08 ,  G06F9/46

CPC classification number: G06F13/16 ,  G06F9/46 ,  G06F12/0859 ,  Y02D10/13

Abstract: An apparatus and method for efficient handling of critical chunks. For example, one embodiment of an apparatus comprises a plurality of agents to perform a respective plurality of data processing functions, at least one of the data processing functions comprising transmitting and receiving chunks of data to and from a memory controller, respectively; a system agent to coordinate requests for transmitting and receiving the chunks of data to and from the memory controller, the system agent comprising: a memory for temporarily storing the chunks of data during transmission between the agents and the memory controller; and scheduling logic to prioritize critical chunks over non-critical chunks across multiple outstanding requests while ensuring that the non-critical chunks do not result in starvation.

Abstract translation: 一种有效处理关键块的装置和方法。 例如，设备的一个实施例包括多个代理以执行相应的多个数据处理功能，所述数据处理功能中的至少一个分别包括向存储器控制器发送数据块和从存储器控制器接收数据块; 系统代理，用于协调向存储器控制器发送和接收数据块的请求，所述系统代理包括：存储器，用于在代理和存储器控制器之间的传输期间临时存储数据块; 以及调度逻辑，以跨多个未完成请求优先处理非关键块的关键块，同时确保非关键块不会导致缺陷。

公开(公告)号：US20160188490A1

公开(公告)日：2016-06-30

申请号：US14583343

申请日：2014-12-26

Applicant: Intel Corporation

Inventor： Ahmad A. Samih

IPC: G06F12/12 ,  G11C7/10 ,  G06F12/08

CPC classification number: G06F12/122 ,  G06F12/0833 ,  G06F12/127 ,  G06F12/128 ,  G06F2212/62 ,  G11C7/1072

Abstract: Memory eviction that recognizes not all evictions have an equal cost on system performance. A management device keeps a weight and/or a count associated with each portion of memory. Each memory portion is associated with a source agent that generates requests to the memory portion. The management device adjusts the weight by a cost factor indicating a latency impact that could occur if the evicted memory portion is again requested after being evicted. The latency impact is a latency impact for the associated source agent to replace the memory portion. In response to detecting an eviction trigger for the memory device, the management device can identify a memory portion having a most extreme weight, such as a highest or lowest value weight. The management device replaces the identified memory portion with a memory portion that triggered the eviction.

Abstract translation: 识别不是所有驱逐的记忆驱逐在系统性能上具有相同的成本。 管理设备保持与每个存储器部分相关联的权重和/或计数。 每个存储器部分与生成对存储器部分的请求的源代理相关联。 管理装置通过成本因素调整权重，指示如果在被驱逐之后再次请求被驱逐的存储器部分可能发生的延迟影响。 延迟影响是相关源代理替换内存部分的延迟影响。 响应于检测到存储器设备的逐出触发，管理设备可以识别具有最高权重的存储器部分，例如最高或最小值权重。 管理设备用触发驱逐的存储器部分替换所识别的存储器部分。