公开(公告)号：US12074806B2

公开(公告)日：2024-08-27

申请号：US17711921

申请日：2022-04-01

Applicant: Intel Corporation

Inventor： S M Iftekharul Alam ,  Satish Chandra Jha ,  Ned M. Smith ,  Vesh Raj Sharma Banjade ,  Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Arvind Merwaday ,  Kuilin Clark Chen ,  Christian Maciocco

IPC: H04L47/72 ,  H04L47/74

CPC classification number: H04L47/72 ,  H04L47/74

Abstract: A resource management framework may be used to improve performance of dominant and non-dominant resources for edge multi-tenant applications. The resource management framework may include an admission control mechanism, which may be used to balance disproportionate resource allocations by controlling allocation of unconstrained resources proportional to the requested dominant resources based on resource availability. The admission control mechanism may provide ongoing monitoring of dominant and non-dominant resource utilization, such as using a hybrid centralized-distributed telemetry collection approach. The resource management framework may also include a lightweight resource monitoring and policy enforcement mechanism on distributed networking elements to reduce or eliminate the exploitations of non-dominant resources.

公开(公告)号：US11792844B2

公开(公告)日：2023-10-17

申请号：US17482883

申请日：2021-09-23

Applicant: Intel Corporation

Inventor： Rath Vannithamby ,  Kathiravetpillai Sivanesan ,  Liuyang Lily Yang ,  Christian Maciocco

IPC: H04W74/00 ,  H04W12/08 ,  H04W48/02 ,  H04W74/08

CPC classification number: H04W74/008 ,  H04W12/08 ,  H04W48/02 ,  H04W74/0833

Abstract: Various systems and methods for implementing random access channel security are described herein. An apparatus for a base station includes: receiver circuitry to receive at the base station, a signal from a user equipment (UE) transmitter to access resources of the base station; statistics circuitry to calculate high-order statistics on the signal to produce an identification indication; a memory device to store the high-order statistics and the identification indication; and processing circuitry to: associate the identification indication with the UE transmitter; use the identification indication to determine that multiple failures of a random access channel (RACH) process have occurred from the UE transmitter; and restrict later attempts by the UE transmitter to perform RACH processes with the base station.

公开(公告)号：US11630706B2

公开(公告)日：2023-04-18

申请号：US17028809

申请日：2020-09-22

Applicant: Intel Corporation

Inventor： Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Ned M. Smith ,  Christian Maciocco

IPC: G06F9/48 ,  G06F9/50

Abstract: Systems and techniques for adaptive limited-duration edge resource management are described herein. Available capacity may be calculated for a resource for a node of the edge computing network based on workloads executing on the node. Available set-aside resources may be determined based on the available capacity. A service request may be received from an application executing on the edge computing node. A priority category may be determined for the service request. Set-aside resources from the available set-aside resources may be assigned to a workload associated with the service request based on the priority category.

公开(公告)号：US11513957B2

公开(公告)日：2022-11-29

申请号：US17027248

申请日：2020-09-21

Applicant: Intel Corporation

Inventor： Ren Wang ,  Andrew J. Herdrich ,  Yen-cheng Liu ,  Herbert H. Hum ,  Jong Soo Park ,  Christopher J. Hughes ,  Namakkal N. Venkatesan ,  Adrian C. Moga ,  Aamer Jaleel ,  Zeshan A. Chishti ,  Mesut A. Ergin ,  Jr-shian Tsai ,  Alexander W. Min ,  Tsung-yuan C. Tai ,  Christian Maciocco ,  Rajesh Sankaran

IPC: G06F12/0842 ,  G06F12/0893 ,  G06F12/109 ,  G06F12/0813 ,  G06F12/0831 ,  G06F9/455

Abstract: Methods and apparatus implementing Hardware/Software co-optimization to improve performance and energy for inter-VM communication for NFVs and other producer-consumer workloads. The apparatus include multi-core processors with multi-level cache hierarchies including and L1 and L2 cache for each core and a shared last-level cache (LLC). One or more machine-level instructions are provided for proactively demoting cachelines from lower cache levels to higher cache levels, including demoting cachelines from L1/L2 caches to an LLC. Techniques are also provided for implementing hardware/software co-optimization in multi-socket NUMA architecture system, wherein cachelines may be selectively demoted and pushed to an LLC in a remote socket. In addition, techniques are disclosure for implementing early snooping in multi-socket systems to reduce latency when accessing cachelines on remote sockets.

公开(公告)号：US20220171643A1

公开(公告)日：2022-06-02

申请号：US17671093

申请日：2022-02-14

Applicant: Intel Corporation

Inventor： Ashok Sunder Rajan ,  Richard A. Uhlig ,  Rajendra S. Yavatkar ,  Tsung-Yuan C. Tai ,  Christian Maciocco ,  Jeffrey R. Jackson ,  Daniel J. Dahle

IPC: G06F9/455 ,  G06F9/50 ,  H04L41/00

Abstract: In the present disclosure, functions associated with the central office of an evolved packet core network are co-located onto a computer platform or sub-components through virtualized function instances. This reduces and/or eliminates the physical interfaces between equipment and permits functional operation of the evolved packet core to occur at a network edge.

公开(公告)号：US20220117036A1

公开(公告)日：2022-04-14

申请号：US17556728

申请日：2021-12-20

Applicant: Intel Corporation

Inventor： Hassnaa Moustafa ,  Francesc Guim Bernat ,  Kannan Babu Ramia ,  Christian Maciocco ,  Kshitij Arun Doshi ,  Nageen Himayat ,  Shilpa Talwar

IPC: H04W84/18 ,  H04W88/08 ,  H04W76/10 ,  H04W24/04 ,  H04W12/08 ,  H04W12/06

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve mobile edge platform resiliency. An example apparatus includes memory, instructions, and processor circuitry to execute the instructions to initiate a search for one of an access point or a cluster head at a first time, in response to detection of the cluster head, initiate an intra-cluster mobile edge platform (MEP) mutual authentication associated with the cluster head, cause transmission of historical activity data to at least one MEP associated with the cluster head, and cause storage of an authentication metric in a secure storage, the authentication metric based on historical connectivity data.

公开(公告)号：US20220107862A1

公开(公告)日：2022-04-07

申请号：US17554902

申请日：2021-12-17

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Doshi ,  Christian Maciocco ,  Satish Jha ,  Vesh Raj Sharma Banjade ,  S M Iftekharul Alam

IPC: G06F11/07 ,  G06F11/30 ,  G06F21/33

Abstract: Example apparatus to perform service failover as disclosed herein are to detect a failure condition associated with execution of a service by a first compute platform, the execution of the service responsive to a first request. Disclosed example apparatus are also to send a second request to a second compute platform to execute the service. Disclosed example apparatus are further to monitor a queue of the first compute platform for a response to the first request, the response to indicate execution of the service by the first compute platform has completed, and when the response is detected in the queue, discard the response from the queue.

公开(公告)号：US11082515B2

公开(公告)日：2021-08-03

申请号：US14866891

申请日：2015-09-26

Applicant: Intel Corporation

Inventor： Dinesh Kumar ,  Nrupal R. Jani ,  Ren Wang ,  Christian Maciocco ,  Sanjeev Jain

IPC: H04L29/08 ,  H04L12/825 ,  H04L12/931 ,  H04L12/725

Abstract: Technologies for offloading data object replication and service function chain management include a switch communicatively coupled to one or more computing nodes capable of executing virtual machines and storing data objects. The switch is configured to determine metadata of a service function chain, transmit a network packet to a service function of the service function chain being executed by one or more of the computing nodes for processing the network packet. The switch is further configured to receive feedback from service function, update the metadata based on the feedback, and transmit the network packet to a next service function of the service function chain. Additionally or alternatively, the switch is configured to identify a plurality of computing nodes (i.e., storage nodes) at which to store a received data object, replicate the data object based on the number of storage nodes, and transmit each of the received data object and replicated data object(s) to different corresponding storage nodes. Other embodiments are described and claimed.

公开(公告)号：US10983585B2

公开(公告)日：2021-04-20

申请号：US15195485

申请日：2016-06-28

Applicant: INTEL CORPORATION

Inventor： Ren Wang ,  Christian Maciocco ,  Sanjay Bakshi ,  Tsung-Yuan Charles Tai

IPC: G06F1/3287 ,  G06F1/329 ,  G06F1/3203 ,  G06F9/4401 ,  G06F1/3209 ,  G06F1/3215

Abstract: The present invention relates to platform power management.

公开(公告)号：US20210014133A1

公开(公告)日：2021-01-14

申请号：US17032993

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Christian Maciocco ,  Kshitij Doshi ,  Francesc Guim Bernat ,  Ned M. Smith ,  Marcin Spoczynski ,  Timothy Verrall ,  Rajesh Gadiyar ,  Trevor Cooper ,  Valerie Parker

IPC: H04L12/24 ,  H04L12/26 ,  H04L29/08

Abstract: Methods and apparatus to coordinate edge platforms are disclosed. A disclosed example apparatus includes to control processing of data associated with edges includes an orchestrator analyzer to determine a first performance requirement of a first microservice of an application and a second performance requirement of a second microservice of the application. The apparatus also includes an orchestrator controller to assign the first microservice and the second microservice across first and second edge nodes between a source network and a destination network by: assigning the first microservice to the first edge node based on a first capability of the first edge node satisfying the first performance requirement of the first microservice, and assigning the second microservice to the second edge node based on a second capability of the second edge node satisfying the second performance requirement of the second microservice.