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1.发明授权Apparatus and method for using conductive adhesive fibers as a data interface 有权使用导电胶粘纤维作为数据接口的装置和方法公开(公告)号：US09502802B2
公开(公告)日：2016-11-22
申请号：US14317383
申请日：2014-06-27
申请人： Intel Corporation
发明人： Scott P. Dubal , Douglas D. Boom , Patrick Connor , Chris Pavlas
摘要： An apparatus and method for using conductive adhesive fibers as a data interface are disclosed. A particular embodiment includes: a first array of conductive adhesive fiber fastener pads configured for attachment to a first item; a second array of conductive adhesive fiber fastener pads configured for attachment to a second item, each pad of the first and second array being fabricated with a hook or loop removable fastener, each removable fastener being electrically conductive, the first array of pads being arranged to align with the second array of pads to create a plurality of independent electrical connections when the first item is removably attached to the second item, the plurality of independent electrical connections establishing a data interface connection between the first item and the second item.
摘要翻译： 公开了一种使用导电粘合纤维作为数据接口的设备和方法。 一个具体实施例包括：第一导电粘合纤维紧固垫片阵列，其被配置用于附接到第一物品; 导电粘合纤维紧固垫的第二阵列，其被配置用于附接到第二物品，所述第一和第二阵列的每个衬垫由钩或环可移除的紧固件制成，每个可移除的紧固件是导电的，所述第一衬垫阵列布置成 当第一项目可移除地附接到第二项目时，多个独立的电连接在第一项目和第二项目之间建立数据接口连接，以与第二阵列阵列对准以产生多个独立的电连接。
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2.发明申请APPARATUS AND METHOD FOR USING CONDUCTIVE ADHESIVE FIBERS AS A DATA INTERFACE 有权使用导电胶粘剂作为数据接口的装置和方法公开(公告)号：US20150380843A1
公开(公告)日：2015-12-31
申请号：US14317383
申请日：2014-06-27
申请人： INTEL CORPORATION
发明人： Scott P. Dubal , Douglas D. Boom , Patrick Connor , Chris Pavals
摘要： An apparatus and method for using conductive adhesive fibers as a data interface are disclosed. A particular embodiment includes: a first array of conductive adhesive fiber fastener pads configured for attachment to a first item; a second array of conductive adhesive fiber fastener pads configured for attachment to a second item, each pad of the first and second array being fabricated with a hook or loop removable fastener, each removable fastener being electrically conductive, the first array of pads being arranged to align with the second array of pads to create a plurality of independent electrical connections when the first item is removably attached to the second item, the plurality of independent electrical connections establishing a data interface connection between the first item and the second item.
摘要翻译： 公开了一种使用导电粘合纤维作为数据接口的设备和方法。 一个具体实施例包括：第一导电粘合纤维紧固垫片阵列，其被配置用于附接到第一物品; 导电粘合纤维紧固垫的第二阵列，其被配置用于附接到第二物品，所述第一和第二阵列的每个衬垫由钩或环可移除的紧固件制成，每个可移除的紧固件是导电的，所述第一衬垫阵列布置成 当第一项目可移除地附接到第二项目时，多个独立的电连接在第一项目和第二项目之间建立数据接口连接，以与第二阵列阵列对准以产生多个独立的电连接。
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公开(公告)号：US09164573B2
公开(公告)日：2015-10-20
申请号：US13785115
申请日：2013-03-05
申请人： Intel Corporation
发明人： Douglas D. Boom , Jordan J. Rodgers
IPC分类号： G06F1/32
CPC分类号： G06F1/3293 , G06F1/32 , G06F1/3225 , Y02D10/122
摘要： In an embodiment, the present invention includes a multicore processor with a front end unit including a fetch unit to fetch instructions and a decode unit to decode the fetched instructions into decoded instructions, a first core coupled to the front end unit to independently execute at least some of the decoded instructions, and a second core coupled to the front end unit to independently execute at least some of the decoded instructions. The second core may have a second power consumption level greater than a power consumption level of the first core and also heterogeneous from the first core. The processor may further include an arbitration logic coupled to the first and second cores to enable the second core to begin execution responsive to a start processor instruction present in the front end unit. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括具有前端单元的多核处理器，前端单元包括用于取指令的提取单元和解码单元，用于将获取的指令解码为经解码的指令;耦合到前端单元的第一核至少独立地执行 解码指令中的一些，以及耦合到前端单元以独立地执行至少一些解码指令的第二核心。 第二核可以具有大于第一核的功率消耗水平的第二功率消耗水平，并且还具有来自第一核的异质。 处理器还可以包括耦合到第一和第二核的仲裁逻辑，以使得第二核能够响应于前端单元中存在的起始处理器指令开始执行。 描述和要求保护其他实施例。
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公开(公告)号：US09009453B2
公开(公告)日：2015-04-14
申请号：US14051283
申请日：2013-10-10
申请人： Intel Corporation
发明人： David M. Lerner , Dave Matheny , Douglas D. Boom
IPC分类号： G06F9/00 , G06F15/177 , G06F15/16 , G06F9/44 , G06F9/445
CPC分类号： G06F15/177 , G06F9/4416
摘要： The present disclosure includes systems and techniques relating to booting to a network storage target. In general, in one implementation, a bus-to-network device driver is loaded during a machine boot, where the bus-to-network device driver is capable of sending machine bus commands over a network, providing access to the network for a network device driver, and distinguishing between received responses to the machine bus commands and other network traffic corresponding to the network device driver. Loading of the bus-to-network device driver can occur in response to an operating system load of bus drivers. For example, the bus-to-network device driver can be an iSCSI driver, and the operating system load of bus drivers can be the operating system load of SCSI drivers.
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公开(公告)号：US20170161139A1
公开(公告)日：2017-06-08
申请号：US14959440
申请日：2015-12-04
申请人： Intel Corporation
发明人： Douglas D. Boom
CPC分类号： G06F11/1004 , G06F3/0619 , G06F3/065 , G06F3/0673
摘要： Apparatuses, systems and methods associated with causing a physical layer (PHY) device are disclosed herein. In embodiments, an apparatus may include a memory device to store one or more activity lists associated with one or more external PHY devices, external to the apparatus, including the first external PHY device. The apparatus may further include a processor, that executes an engine, to receive a request for performance of the operation by the first external PHY device, identify an activity list associated with the first external PHY device from the one or more activity lists, identify an activity to effectuate performance of the operation from the activity list associated with the first external PHY device and cause the first external PHY device to perform the operation in accordance with the activity.
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公开(公告)号：US08972710B2
公开(公告)日：2015-03-03
申请号：US13680844
申请日：2012-11-19
申请人： Intel Corporation
发明人： David M. Lerner , Dave Matheny , Douglas D. Boom
CPC分类号： G06F15/177 , G06F9/4416
摘要： The present disclosure includes systems and techniques relating to booting to a network storage target. In general, in one implementation, a bus-to-network device driver is loaded during a machine boot, where the bus-to-network device driver is capable of sending machine bus commands over a network, providing access to the network for a network device driver, and distinguishing between received responses to the machine bus commands and other network traffic corresponding to the network device driver. Loading of the bus-to-network device driver can occur in response to an operating system load of bus drivers. For example, the bus-to-network device driver can be an iSCSI driver, and the operating system load of bus drivers can be the operating system load of SCSI drivers.
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公开(公告)号：US08560821B2
公开(公告)日：2013-10-15
申请号：US13682191
申请日：2012-11-20
申请人： Intel Corporation
发明人： David M. Lerner , Dave Matheny , Douglas D. Boom
CPC分类号： G06F15/177 , G06F9/4416
摘要： The present disclosure includes systems and techniques relating to booting to a network storage target. In general, in one implementation, a bus-to-network device driver is loaded during a machine boot, where the bus-to-network device driver is capable of sending machine bus commands over a network, providing access to the network for a network device driver, and distinguishing between received responses to the machine bus commands and other network traffic corresponding to the network device driver. Loading of the bus-to-network device driver can occur in response to an operating system load of bus drivers. For example, the bus-to-network device driver can be an iSCSI driver, and the operating system load of bus drivers can be the operating system load of SCSI drivers.
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公开(公告)号：US09766971B2
公开(公告)日：2017-09-19
申请号：US14959440
申请日：2015-12-04
申请人： Intel Corporation
发明人： Douglas D. Boom
CPC分类号： G06F11/1004 , G06F3/0619 , G06F3/065 , G06F3/0673
摘要： Apparatuses, systems and methods associated with causing a physical layer (PHY) device are disclosed herein. In embodiments, an apparatus may include a memory device to store one or more activity lists associated with one or more external PHY devices, external to the apparatus, including the first external PHY device. The apparatus may further include a processor, that executes an engine, to receive a request for performance of the operation by the first external PHY device, identify an activity list associated with the first external PHY device from the one or more activity lists, identify an activity to effectuate performance of the operation from the activity list associated with the first external PHY device and cause the first external PHY device to perform the operation in accordance with the activity.
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