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公开(公告)号：US20190102315A1
公开(公告)日：2019-04-04
申请号：US15719618
申请日：2017-09-29
Applicant: INTEL CORPORATION
Inventor： FRANCESC GUIM BERNAT , KARTHIK KUMAR , MARK SCHMISSEUR , THOMAS WILLHALM
IPC: G06F12/10
CPC classification number: G06F12/10 , G06F9/3004 , G06F12/02 , G06F12/0207 , G06F12/0223 , G06F2212/1016 , G06F2212/657
Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to receive a request from a core, the request associated with a memory operation to read or write data, and the request comprising a first address and an offset, the first address to identify a memory location of a memory. Embodiments include performing a first iteration of a memory indirection operation comprising reading the memory at the memory location to determine a second address based on the first address, and determining a memory resource based on the second address and the offset, the memory resource to perform the memory operation for the computing resource or perform a second iteration of the memory indirection operation.
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2.发明公开公开(公告)号：US20240179078A1
公开(公告)日：2024-05-30
申请号：US18526782
申请日：2023-12-01
Applicant: INTEL CORPORATION
Inventor： FRANCESC GUIM BERNAT , KSHITIJ A. DOSHI , DANIEL RIVAS BARRAGAN , MARK A. SCHMISSEUR , STEEN LARSEN
IPC: H04L41/5025 , H04L41/0896 , H04L43/0817 , H04L43/16
CPC classification number: H04L41/5025 , H04L41/0896 , H04L43/0817 , H04L43/16
Abstract: Embodiments may be generally directed to techniques to cause communication of a registration request between a first end-point and a second end-point of an end-to-end path, the registration request to establish resource load monitoring for one or more resources of the end-to-end path, receive one or more acknowledgements indicating resource loads for each of the one or more resources of the end-to-end path, at least one of the acknowledgements to indicate a resource of the one or more resources is not meeting a threshold requirement for the end-to-end path, and perform an action for communication traffic utilizing the one or more resources based on the acknowledgement.
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公开(公告)号：US20210406147A1
公开(公告)日：2021-12-30
申请号：US16914305
申请日：2020-06-27
Applicant: Intel Corporation
Inventor： BIN LI , REN WANG , KSHITIJ ARUN DOSHI , FRANCESC GUIM BERNAT , YIPENG WANG , RAVISHANKAR IYER , ANDREW HERDRICH , TSUNG-YUAN TAI , ZHU ZHOU , RASIKA SUBRAMANIAN
Abstract: An apparatus and method for closed loop dynamic resource allocation. For example, one embodiment of a method comprises: collecting data related to usage of a plurality of resources by a plurality of workloads over one or more time periods, the workloads including priority workloads associated with one or more guaranteed performance levels and best effort workloads not associated with guaranteed performance levels; analyzing the data to identify resource reallocations from one or more of the priority workloads to one or more of the best effort workloads in one or more subsequent time periods while still maintaining the guaranteed performance levels; reallocating the resources from the priority workloads to the best effort workloads for the subsequent time periods; monitoring execution of the priority workloads with respect to the guaranteed performance level during the subsequent time periods; and preemptively reallocating resources from the best effort workloads to the priority workloads during the subsequent time periods to ensure compliance with the guaranteed performance level and responsive to detecting that the guaranteed performance level is in danger of being breached.
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公开(公告)号：US20210273863A1
公开(公告)日：2021-09-02
申请号：US17202703
申请日：2021-03-16
Applicant: INTEL CORPORATION
Inventor： FRANCESC GUIM BERNAT , KSHITIJ A. DOSHI , DANIEL RIVAS BARRAGAN , MARK A. SCHMISSEUR , STEEN LARSEN
Abstract: Embodiments may be generally directed to techniques to cause communication of a registration request between a first end-point and a second end-point of an end-to-end path, the registration request to establish resource load monitoring for one or more resources of the end-to-end path, receive one or more acknowledgements indicating resource loads for each of the one or more resources of the end-to-end path, at least one of the acknowledgements to indicate a resource of the one or more resources is not meeting a threshold requirement for the end-to-end path, and perform an action for communication traffic utilizing the one or more resources based on the acknowledgement.
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5.发明申请公开(公告)号：US20180026868A1
公开(公告)日：2018-01-25
申请号：US15655846
申请日：2017-07-20
Applicant: INTEL CORPORATION
Inventor： FRANCESC GUIM BERNAT , SUSANNE M. BALLE , DANIEL RIVAS BARRAGAN , JOHN CHUN KWOK LEUNG , SURAJ PRABHAKARAN , MURUGASAMY K. NACHIMUTHU , SLAWOMIR PUTYRSKI
IPC: H04L12/26
Abstract: Techniques for reducing fragmentation in software-defined infrastructures are described. A compute node, including one or more processor circuits, may be configured to access one or more remote resources via a fabric, the compute node may be configured to receive a dynamic tolerated fragmentation for the one or more remote resources. The compute node may be configured to monitor the performance of the one or more remote resources. For example, the compute node may be configured to monitor if one or more of the monitored resources were to exceed a threshold bandwidth or latency range as defined by the dynamic tolerated fragmentation. The compute node may be configured to determine that the monitored performance of the one or more remote resources is outside a threshold defined by the dynamic tolerated fragmentation. If one or more of the remote resources is outside the threshold, for a predetermined period of time, or otherwise, the compute node may be configured to determine so and take appropriate measures, such as generating a message indicating that performance of the one or more remote resources is outside a threshold defined by the dynamic tolerated fragmentation. Other embodiments are described and claimed.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20210406075A1
公开(公告)日：2021-12-30
申请号：US16914301
申请日：2020-06-27
Applicant: Intel Corporation
Inventor： RAMESHKUMAR ILLIKKAL , ANDREW J. HERDRICH , FRANCESC GUIM BERNAT , RAVISHANKAR IYER
Abstract: An apparatus and method for dynamic resource allocation with mile/performance markers. For example, one embodiment of a processor comprises: resource allocation circuitry to allocate a plurality of hardware resources to a plurality of workloads including priority workloads associated with one or more guaranteed performance levels; and monitoring circuitry to evaluate execution progress of a workload across a plurality of nodes, each node to execute one or more processing stages of the workload, wherein the monitoring circuitry is to evaluate the execution progress of the workload, at least in part, by reading progress markers advertised by the workload at the specified processing stages, wherein the monitoring circuitry is to detect that the workload may not meet one of the guaranteed performance levels based on the progress markers, and wherein the resource allocation circuitry, responsive to the monitoring circuitry, is to reallocate one or more of the plurality of hardware resources to improve the performance level of the workload.
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公开(公告)号：US20190042488A1
公开(公告)日：2019-02-07
申请号：US15857337
申请日：2017-12-28
Applicant: Intel Corporation
Inventor： FRANCESC GUIM BERNAT , MARK A. SCHMISSEUR , KARTHIK KUMAR , THOMAS WILLHALM
Abstract: Technology for a memory controller is described. The memory controller can receive a request from a data consumer node in a data center for training data. The training data indicated in the request can correspond to a model identifier (ID) of a model that runs on the data consumer node. The memory controller can identify a data provider node in the data center that stores the training data that is requested by the data consumer node. The data provider node can be identified using a tracking table that is maintained at the memory controller. The memory controller can send an instruction to the data provider node that instructs the data provider node to send the training data to the data consumer node to enable training of the model that runs on the data consumer node.
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公开(公告)号：US20190034763A1
公开(公告)日：2019-01-31
申请号：US15855891
申请日：2017-12-27
Applicant: Intel Corporation
Inventor： FRANCESC GUIM BERNAT , KARTHIK KUMAR , MARK A. SCHMISSEUR , THOMAS WILLHALM
Abstract: Technology for a memory controller is described. The memory controller can receive a request to store training data. The request can include a model identifier (ID) that identifies a model that is associated with the training data. The memory controller can send a write request to store the training data associated with the model ID in a memory region in a pooled memory that is allocated for the model ID. The training data that is stored in the memory region in the pooled memory can be addressable based on the model ID.
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9.发明申请公开(公告)号：US20180091383A1
公开(公告)日：2018-03-29
申请号：US15279375
申请日：2016-09-28
Applicant: INTEL CORPORATION
Inventor： FRANCESC GUIM BERNAT , KSHITIJ A. DOSHI , DANIEL RIVAS BARRAGAN , MARK A. SCHMISSEUR , STEEN LARSEN
CPC classification number: H04L41/5025 , H04L41/0896 , H04L43/0817 , H04L43/16
Abstract: Embodiments may be generally directed to techniques to cause communication of a registration request between a first end-point and a second end-point of an end-to-end path, the registration request to establish resource load monitoring for one or more resources of the end-to-end path, receive one or more acknowledgements indicating resource loads for each of the one or more resources of the end-to-end path, at least one of the acknowledgements to indicate a resource of the one or more resources is not meeting a threshold requirement for the end-to-end path, and perform an action for communication traffic utilizing the one or more resources based on the acknowledgement.
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公开(公告)号：US20210377356A1
公开(公告)日：2021-12-02
申请号：US16887087
申请日：2020-05-29
Applicant: Intel Corporation
Inventor： FRANCESC GUIM BERNAT , KSHITIJ ARUN DOSHI , KENNETH SHOEMAKER , VINODH GOPAL , NED M. SMITH
IPC: H04L29/08 , H04L12/935 , H04L12/933 , H04L12/861 , H04L12/927
Abstract: In one embodiment, a method includes: receiving, in an edge platform, a plurality of messages from a plurality of edge devices coupled to the edge platform, the plurality of messages comprising metadata including priority information and granularity information; extracting at least the priority information from the plurality of messages; storing the plurality of messages in entries of a pending request queue according to the priority information; selecting a first message stored in the pending request queue for delivery to a destination circuit; and sending a message header for the first message to the destination circuit via at least one interface circuit, the message header including the priority information, and thereafter sending a plurality of packets including payload information of the first message to the destination circuit via the at least one interface circuit. Other embodiments are described and claimed.
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