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    Techniques for routing service chain flow packets between virtual machines
    1.
    发明授权
    Techniques for routing service chain flow packets between virtual machines 有权

    公开(公告)号：US10331468B2

    公开(公告)日：2019-06-25

    申请号：US15284373

    申请日：2016-10-03

    Applicant: Intel Corporation

    Inventor： Mark D. Gray

    IPC: G06F9/455 ,  G06F9/54 ,  H04L12/725 ,  G06F13/14 ,  H04L12/741 ,  H04L12/931

    Abstract: Examples may include a host computing platform having a multi-core processor capable of supporting a host operating system and a plurality of virtual machines (VMs). Support may include processing elements or cores for the multi-core processor being capable of separately supporting individual VMs. The individual VMs may be capable of executing separate applications used to process packets for a service chain flow. In some examples, techniques for routing the packets for the service chain flow between the individual VMs may include distributing at least some switch logic between the individual VMs.

    Techniques for routing service chain flow packets between virtual machines
    2.
    发明授权
    Techniques for routing service chain flow packets between virtual machines 有权
    在虚拟机之间路由服务链流分组的技术

    公开(公告)号：US09459903B2

    公开(公告)日：2016-10-04

    申请号：US14494912

    申请日：2014-09-24

    Applicant: INTEL CORPORATION

    Inventor： Mark D. Gray

    IPC: G06F9/455

    CPC classification number: G06F9/45558 ,  G06F9/45504 ,  G06F9/544 ,  G06F9/546 ,  G06F13/14 ,  G06F2009/45583 ,  G06F2009/45595 ,  H04L45/306 ,  H04L45/745 ,  H04L49/70

    Abstract: Examples may include a host computing platform having a multi-core processor capable of supporting a host operating system and a plurality of virtual machines (VMs). Support may include processing elements or cores for the multi-core processor being capable of separately supporting individual VMs. The individual VMs may be capable of executing separate applications used to process packets for a service chain flow. In some examples, techniques for routing the packets for the service chain flow between the individual VMs may include distributing at least some switch logic between the individual VMs.

    Abstract translation: 示例可以包括具有能够支持主机操作系统和多个虚拟机（VM）的多核处理器的主机计算平台。 支持可以包括用于多核处理器能够分别支持各个VM的处理元件或核。 各个VM可能能够执行用于处理服务链流的分组的单独的应用程序。 在一些示例中，用于在各个VM之间路由用于服务链流的分组的技术可以包括在各个VM之间分配至少一些开关逻辑。

    Techniques for network packet classification, transmission and receipt
    3.
    发明授权
    Techniques for network packet classification, transmission and receipt 有权

    公开(公告)号：US11487567B2

    公开(公告)日：2022-11-01

    申请号：US16181145

    申请日：2018-11-05

    Applicant: Intel Corporation

    Inventor： Ciara Loftus ,  Subarna Kar ,  Namakkal Venkatesan ,  Mark D. Gray

    IPC: H04L12/66 ,  G06F9/455 ,  H04L69/22 ,  H04L45/745 ,  H04L47/50 ,  H04L49/00

    Abstract: A virtual machine (VM) can provision a region of memory for a queue to receive packet header, packet payload, and/or descriptors from the network interface. A virtual switch can provide a routing rule to a network interface to route a received packet header, packet payload, and/or descriptors associated with the VM to the provisioned queue. A direct memory access (DMA) transfer operation can be used to copy the received packet header, packet payload, and/or descriptors associated with the VM from the network interface to the provisioned queue without copying the packet header or payload to an intermediate buffer and from the intermediate buffer to the provisioned queue. A DMA operation can be used to transfer a packet or its descriptor from the provisioned queue to the network interface for transmission.

    Generating and/or receiving at least one packet to facilitate, at least in part, network path establishment
    4.
    发明授权
    Generating and/or receiving at least one packet to facilitate, at least in part, network path establishment 有权

    公开(公告)号：US10382344B2

    公开(公告)日：2019-08-13

    申请号：US15645955

    申请日：2017-07-10

    Applicant: Intel Corporation

    Inventor： Iosif Gasparakis ,  Mark D. Gray

    IPC: H04L12/851 ,  H04L12/26 ,  H04L29/06

    Abstract: An embodiment may include circuitry to be included, at least in part, in at least one node in a network. The circuitry may generate, at least in part, and/or receive, at least in part, at least one packet. The packet may be received, at least in part, by at least one switch node in the network. The switch node may designate, in response at least in part to the packet, at least one port of the switch node to be used to facilitate, at least in part, establishment, at least in part, of at least one path for propagation of at least one flow between at least two other nodes in the network. The packet may be generated based at least in part upon (1) at least one application classification, (2) at least one allocation request, and (3) network resource availability information.

    ENHANCED NFV SWITCHING
    8.
    发明申请
    ENHANCED NFV SWITCHING 审中-公开

    公开(公告)号：US20180352038A1

    公开(公告)日：2018-12-06

    申请号：US15607832

    申请日：2017-05-30

    Applicant: Intel Corporation

    Inventor： Krishnamurthy Jambur Sathyanarayana ,  Niall Power ,  Christopher MacNamara ,  Mark D. Gray

    IPC: H04L29/08 ,  G06F9/455 ,  G06F9/50

    Abstract: A computing apparatus, including: a hardware platform; and a virtual switch (vSwitch) to operate on the hardware platform, the vSwitch including a virtual ingress interface, an inline virtual egress interface to communicatively couple to an inline data path, a diverted virtual egress interface to communicatively couple to a diverted data path, a diversion logic block, and logic to: communicatively couple to a local virtual machine (VM) via the diverted data path, the VM to provide an edge computing function; communicatively couple to a downstream data center via the inline data path; receive an incoming packet via the virtual ingress interface; determine that the incoming packet belongs to a class of packets for diversion processing; provide the incoming packet to the diversion logic block, wherein the diversion logic block is to determine that the packet is an edge computing flow to be diverted to the edge computing function via the diverted data path; and direct the incoming packet to the local VM via the diverted virtual egress interface.

    RESOURCE MONITORING
    9.
    发明申请
    RESOURCE MONITORING 审中-公开

    公开(公告)号：US20180287911A1

    公开(公告)日：2018-10-04

    申请号：US15475864

    申请日：2017-03-31

    Applicant: Intel Corporation

    Inventor： Mark D. Gray ,  John J. Browne ,  Maryam Tahhan

    IPC: H04L12/26

    Abstract: Particular embodiments described herein provide for a network element that can be configured to receive a link monitoring message, determine one or more resources associated with the link monitoring message, determine a status of each of the one or more resources, and send a response that provides an indication of the status of each of the one or more resources. In an example, the link monitoring is part of a bidirectional forwarding detection packet.

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