公开(公告)号：US20170012029A1

公开(公告)日：2017-01-12

申请号：US15117708

申请日：2014-03-28

Applicant: INTEL CORPORATION

Inventor： William J. LAMBERT ,  Robert L. SANKMAN ,  Tyler N. OSBORN ,  Charles A. GEALER

IPC: H01L25/11 ,  H01L25/00 ,  H01L25/065 ,  H01L23/48 ,  H01L49/02

CPC classification number: H01L25/117 ,  H01L23/481 ,  H01L23/50 ,  H01L23/5223 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L28/40 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/014

Abstract: An apparatus including a die including a plurality of through silicon vias (TSV's) extending from a device side to a backside of the die; and a decoupling capacitor coupled to the TSV's. A method including providing a die including a plurality of through silicon vias (TSV's) extending from a device side to a backside of the die; coupling a decoupling capacitor to the backside of the die. An apparatus including a computing device including a package including a microprocessor including a device side and a backside with through silicon vias (TSV's) extending from the device side to the backside, and a decoupling capacitor coupled to the backside of the die; and a printed circuit board, wherein the package is coupled to the printed circuit board.

Abstract translation: 一种包括模具的设备，所述裸片包括从器件侧延伸到所述管芯的背面的多个穿通硅通孔（TSV）; 以及耦合到TSV的去耦电容器。 一种包括提供包括从所述管芯的器件侧延伸到所述管芯的背面的多个穿通硅通孔（TSV）的管芯的方法; 将去耦电容耦合到芯片的背面。 一种包括计算装置的装置，包括包括微处理器的封装，所述微处理器包括从器件侧延伸到背面的通过硅通孔（TSV）的器件侧和背面;以及耦合到管芯背面的去耦电容器; 以及印刷电路板，其中所述封装件耦合到所述印刷电路板。