公开(公告)号：US20220399277A1

公开(公告)日：2022-12-15

申请号：US17345969

申请日：2021-06-11

Applicant: INTEL CORPORATION

Inventor： Adel A. Elsherbini ,  Scott E. Siers ,  Sathya Narasimman Tiagaraj ,  Gerald S. Pasdast ,  Zhiguo Qian ,  Kalyan C. Kolluru ,  Vivek Kumar Rajan ,  Shawna M. Liff ,  Johanna M. Swan

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00

Abstract: An Integrated Circuit (IC), comprising a first conductive trace on a first die, a second conductive trace on a second die, and a conductive pathway electrically coupling the first conductive trace with the second conductive trace. The second die is coupled to the first die with interconnects. The conductive pathway comprises a portion of the interconnects located proximate to a periphery of a region in the first die through which the first conductive trace is not routable. In some embodiments, the conductive pathway reroutes electrical connections away from the region. The region comprises a high congestion zone having high routing density in some embodiments. In other embodiments, the region comprises a “keep-out” zone.

公开(公告)号：US20230197676A1

公开(公告)日：2023-06-22

申请号：US17557166

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Gerald S. Pasdast ,  Adel A. Elsherbini ,  Nevine Nassif ,  Carleton L. Molnar ,  Vivek Kumar Rajan ,  Peipei Wang ,  Shawna M. Liff ,  Tejpal Singh ,  Johanna M. Swan

IPC: H01L25/065 ,  H01L23/498

CPC classification number: H01L25/0652 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/49838

Abstract: A microelectronic assembly is provided, comprising: a first integrated circuit (IC) die having a first connection to a first serializer/deserializer (SERDES) circuit and a second connection to a second SERDES circuit; a second IC die having the first SERDES circuit; and a third IC die having the second SERDES circuit, in which the first IC die is in a first layer, the second IC die and the third IC die are in a second layer not coplanar with the first layer, the first layer and the second layer are coupled by interconnects having a pitch of less than 10 micrometers between adjacent ones of the interconnects, and the first SERDES circuit and the second SERDES circuit are coupled by a conductive pathway.

公开(公告)号：US20230197675A1

公开(公告)日：2023-06-22

申请号：US17552845

申请日：2021-12-16

Applicant: Intel Corporation

Inventor： Gerald S. Pasdast ,  Yidnekachew Mekonnen ,  Adel A. Elsherbini ,  Peipei Wang ,  Vivek Kumar Rajan ,  Georgios Dogiamis

IPC: H01L25/065 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L25/0652 ,  H01L23/481 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/37001

Abstract: Embodiments of the present disclosure provide a microelectronic assembly comprising: a first integrated circuit (IC) die, the first IC die comprising an input/output (IO) circuit; and a plurality of IC dies, the plurality of IC dies comprising a second IC die, the second IC die comprising a microcontroller circuit to control the IO circuit, wherein the first IC die and the plurality of IC dies are coupled with interconnects having a pitch of less than 10 micrometers between adjacent ones of the interconnects.

公开(公告)号：US20230163098A1

公开(公告)日：2023-05-25

申请号：US17531374

申请日：2021-11-19

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  William J. Lambert ,  Krishna Bharath ,  Shawna M. Liff ,  Nicolas Butzen ,  Georgios Dogiamis ,  Gerald S. Pasdast ,  Vivek Kumar Rajan ,  Sathya Narasimman Tiagaraj ,  Timothy Francis Schmidt

IPC: H01L25/065

CPC classification number: H01L25/0652 ,  H01L25/18

Abstract: Embodiments of the present disclosure provide a microelectronic assembly comprising: an integrated circuit (IC) die in a first layer and a plurality of IC dies in a second layer, at least two adjacent IC dies in the plurality being electrically coupled along their proximate edges by the IC die. The first layer and the second layer are electrically and mechanically coupled by interconnects having a pitch of less than 10 micrometers between adjacent interconnects, and the IC die comprises capacitors and voltage regulator circuitry.