3D-microstrip branchline coupler
    2.
    发明授权

    公开(公告)号:US10586752B2

    公开(公告)日:2020-03-10

    申请号:US15997837

    申请日:2018-06-05

    Abstract: The disclosure is directed to semiconductor structures and, more particularly, to a three dimensional microstrip branchline coupler and methods of manufacture. The structure includes a plurality of through silicon vias and conductive lines electrically connected to a first end and a second end of respective ones of the plurality of through silicon vias. A first through silicon via of the plurality of through silicon vias forms a first port of a three dimensional (3D) branchline coupler. A second through silicon via of the plurality of through silicon vias forms a second port of the 3D branchline coupler. A third through silicon via of the plurality of through silicon vias forms a third port of the 3D branchline coupler. A fourth through silicon via of the plurality of through silicon vias forms a fourth port of the 3D branchline coupler.

    3D-microstrip branchline coupler
    4.
    发明授权

    公开(公告)号:US10832989B2

    公开(公告)日:2020-11-10

    申请号:US16583987

    申请日:2019-09-26

    Abstract: The disclosure is directed to semiconductor structures and, more particularly, to a three dimensional microstrip branchline coupler and methods of manufacture. The structure includes a plurality of through silicon vias and conductive lines electrically connected to a first end and a second end of respective ones of the plurality of through silicon vias. A first through silicon via of the plurality of through silicon vias forms a first port of a three dimensional (3D) branchline coupler. A second through silicon via of the plurality of through silicon vias forms a second port of the 3D branchline coupler. A third through silicon via of the plurality of through silicon vias forms a third port of the 3D branchline coupler. A fourth through silicon via of the plurality of through silicon vias forms a fourth port of the 3D branchline coupler.

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