公开(公告)号：US20140177189A1

公开(公告)日：2014-06-26

申请号：US13912207

申请日：2013-06-07

Applicant: Industrial Technology Research Institute

Inventor： Chang-Chih Liu ,  Hsun Yu ,  Peng-Shu Chen ,  Shih-Hsien Wu

IPC: H05K1/14

CPC classification number: H01L25/00 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/64 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/02375 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13024 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/1703 ,  H01L2224/17106 ,  H01L2224/17515 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/4917 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A chip stacking structure including a plurality of microbump structures, a plurality of first substrates, at least one first space layer, a plurality of second substrates and at least one second space layer is provided. The first substrates are stacked upon each other by a portion of the microbump structures, and each of the first substrates includes at least one first redistribution layer. The first space layer is located between the stacked first substrates. The second substrates are stacked on at least one of the first substrates by another portion of the microbump structures, and each of the second substrates includes at least one second redistribution layer. The second space layer is located between the stacked first and second substrates. The first redistribution layers, the second redistribution layers and the microbump structures form a plurality of impedance elements, and the impedance elements provide a specific oscillation frequency.

Abstract translation: 提供了包括多个微型块结构，多个第一基板，至少一个第一空间层，多个第二基板和至少一个第二空间层的芯片堆叠结构。 第一基板通过微型块结构的一部分彼此堆叠，并且每个第一基板包括至少一个第一再分布层。 第一空间层位于堆叠的第一基板之间。 第二基板通过微型块结构的另一部分堆叠在至少一个第一基板上，并且每个第二基板包括至少一个第二再分布层。 第二空间层位于堆叠的第一和第二基板之间。 第一再分布层，第二再分配层和微型块结构形成多个阻抗元件，并且阻抗元件提供特定的振荡频率。

公开(公告)号：US09013892B2

公开(公告)日：2015-04-21

申请号：US13912207

申请日：2013-06-07

Applicant: Industrial Technology Research Institute

Inventor： Chang-Chih Liu ,  Hsun Yu ,  Peng-Shu Chen ,  Shih-Hsien Wu

IPC: H05K7/00 ,  H01L25/00 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L25/00 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/64 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/02375 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13024 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/1703 ,  H01L2224/17106 ,  H01L2224/17515 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/4917 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A chip stacking structure including a plurality of microbump structures, a plurality of first substrates, at least one first space layer, a plurality of second substrates and at least one second space layer is provided. The first substrates are stacked upon each other by a portion of the microbump structures, and each of the first substrates includes at least one first redistribution layer. The first space layer is located between the stacked first substrates. The second substrates are stacked on at least one of the first substrates by another portion of the microbump structures, and each of the second substrates includes at least one second redistribution layer. The second space layer is located between the stacked first and second substrates. The first redistribution layers, the second redistribution layers and the microbump structures form a plurality of impedance elements, and the impedance elements provide a specific oscillation frequency.

Abstract translation: 提供了包括多个微型块结构，多个第一基板，至少一个第一空间层，多个第二基板和至少一个第二空间层的芯片堆叠结构。 第一基板通过微型块结构的一部分彼此堆叠，并且每个第一基板包括至少一个第一再分布层。 第一空间层位于堆叠的第一基板之间。 第二基板通过微型块结构的另一部分堆叠在至少一个第一基板上，并且每个第二基板包括至少一个第二再分布层。 第二空间层位于堆叠的第一和第二基板之间。 第一再分布层，第二再分配层和微型块结构形成多个阻抗元件，并且阻抗元件提供特定的振荡频率。