公开(公告)号：US20240194444A1

公开(公告)日：2024-06-13

申请号：US18524043

申请日：2023-11-30

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Axel König ,  Bernhard Leitl

IPC: H01J37/317 ,  H01J37/304

CPC classification number: H01J37/3171 ,  H01J37/304 ,  H01J2237/24405 ,  H01J2237/24528 ,  H01J2237/24535 ,  H01J2237/31703

Abstract: An ion beam current measurement device includes a first Faraday cup having a first ion beam entrance slit of a first width W1. The first Faraday cup is configured to generate a first current signal. The device further includes a second Faraday cup having a second ion beam entrance slit of a second width W2. The second Faraday cup is configured to generate a second current signal. The slit widths are designed such that W2 is greater than W1.

公开(公告)号：US20230253454A1

公开(公告)日：2023-08-10

申请号：US18100144

申请日：2023-01-23

Applicant: Infineon Technologies AG

Inventor： Ravi Keshav Joshi ,  Thomas Ralf Siemieniec ,  Werner Schustereder ,  Kristijan Luka Mletschnig ,  Axel König

IPC: H01L29/08 ,  H01L29/16 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66

CPC classification number: H01L29/0869 ,  H01L29/1608 ,  H01L29/41741 ,  H01L29/45 ,  H01L29/7813 ,  H01L21/0475 ,  H01L21/0485 ,  H01L29/66068

Abstract: A method of manufacturing a semiconductor device includes forming a trench that extends from a first surface into a silicon carbide body. A first doped region and an oppositely doped second doped region are formed in the silicon carbide body. A lower layer structure is formed on a lower sidewall portion of the trench. An upper layer stack is formed on an upper sidewall portion and/or on the first surface. The first doped region and the upper layer stack are in direct contact along the upper sidewall portion and/or on the first surface. The second doped region and the lower layer structure are in direct contact along the lower sidewall portion.

公开(公告)号：US20250014902A1

公开(公告)日：2025-01-09

申请号：US18754277

申请日：2024-06-26

Applicant: Infineon Technologies AG

Inventor： Axel König ,  Kristijan Luka Mletschnig ,  Andreas Vörckel ,  Caspar Leendertz ,  Werner Schustereder ,  Hans-Joachim Schulze

IPC: H01L21/04 ,  H01L21/02 ,  H01L21/324

Abstract: A method of manufacturing a semiconductor device includes forming a doped region in a semiconductor body. Forming the doped region includes: introducing first dopants through a first surface of the semiconductor body at a first vertical reference level by a first ion implantation process; thereafter, applying a first heat treatment to the semiconductor body; and thereafter, introducing second dopants through the first surface of the semiconductor body at the first vertical reference level by a second ion implantation process. An atomic number of the first dopants is equal to an atomic number of the second dopants. An ion implantation energy of the second ion implantation process differs by less than 20% from an ion implantation energy of the first ion implantation process. An ion implantation dose of the second ion implantation process differs by less than 20% from an ion implantation dose of the first ion implantation process.