Result register with readout counter value

    公开(公告)号:US12254212B2

    公开(公告)日:2025-03-18

    申请号:US18311052

    申请日:2023-05-02

    Abstract: A circuit includes one or more datastores configured to store a result register and a readout counter value and logic circuitry coupled to the one or more datastores. The logic circuitry is configured to cause, for a cycle of a plurality of cycles of a periodic signal, one or more analog-to-digital converters (ADCs) to store data to the result register and modify the readout counter value in response to the one or more ADCs storing the data to the result register for the cycle. In response to a read request for the data at the result register for the cycle, the logic circuitry is configured to output the data stored by the result register, output the readout counter value for the cycle, and, after the output of the readout counter value, set the readout counter value to a predetermined value.

    SCHEDULING COMMUTATION BEHAVIOR CHANGES FOR A DRIVER

    公开(公告)号:US20230125458A1

    公开(公告)日:2023-04-27

    申请号:US17509428

    申请日:2021-10-25

    Abstract: A driver may comprise a first node, a second node, and processing circuitry. The first node is configured to receive a command from controller circuitry. The second node is configured to receive a commutation signal for activating or deactivating a switch. The processing circuitry is configured to determine, based on the received command, an activation setting for an activation characteristic for the switch and a deactivation setting for a deactivation characteristic for the switch and drive the switch based on the commutation signal. To drive the switch, the processing circuitry is configured to change, at a first time, the deactivation characteristic for the switch from a previous deactivation setting to the determined deactivation setting and change, at a second time that is different from the first time, the activation characteristic for the switch from a previous activation setting to the determined activation setting.

    Ripple detector for monitoring a supply to galvanically isolated gate driver

    公开(公告)号:US11581799B2

    公开(公告)日:2023-02-14

    申请号:US17307860

    申请日:2021-05-04

    Abstract: A driver circuit is configured to control a power transistor. The driver circuit comprises a signal generator configured to generate a control signal for the power transistor based on a supply signal and an input signal from a control unit. In addition, the driver circuit includes a ripple detector configured to receive the supply signal and determine whether the supply signal includes a ripple error. In some examples, the ripple detector may be configured to send a warning signal to the control unit in response to detecting the ripple error.

    Voltage monitor using switching signal for motor

    公开(公告)号:US11561247B2

    公开(公告)日:2023-01-24

    申请号:US17234165

    申请日:2021-04-19

    Abstract: A device configured to monitor a voltage at a voltage rail for driving a motor includes processing circuitry configured to receive an indication of a switching signal for a phase of a plurality of phases of the motor. Inverter circuitry associated with the device is configured to electrically couple the phase to the voltage rail or to a reference rail associated with the voltage rail based on a driving signal that is generated based on the switching signal. The processing circuitry is further configured to determine a measurement time to measure the voltage at the voltage rail based on the switching signal and generate, using an analog-to-digital converter (ADC), a set of measured voltage values based on the voltage at the voltage rail during the measurement time.

    DIFFERENTIAL TECHNIQUES FOR MEASURING VOLTAGE OVER A POWER SWITCH

    公开(公告)号:US20220416766A1

    公开(公告)日:2022-12-29

    申请号:US17356114

    申请日:2021-06-23

    Abstract: A driver circuit is configured to deliver drive signals from an output pin to a power switch to control ON/OFF switching of the power switch. A first detection pin of the driver circuit is configured to receive a first signal associated with the power switch, wherein the first signal indicates a voltage drop over the power switch and a voltage drop over one or more other circuit elements. A second detection pin is configured to receive a second signal, wherein the second signal indicates a voltage drop over one or more matched circuit elements, wherein the one or more matched circuit elements associated with the second signal are substantially identical to the one or more other circuit elements associated with the first signal. The driver circuit is configured to determine the voltage drop over the power switch based on a difference between the first signal and the second signal.

    RIPPLE DETECTOR FOR MONITORING A SUPPLY TO GALVANICALLY ISOLATED GATE DRIVER

    公开(公告)号:US20220360163A1

    公开(公告)日:2022-11-10

    申请号:US17307860

    申请日:2021-05-04

    Abstract: A driver circuit is configured to control a power transistor. The driver circuit comprises a signal generator configured to generate a control signal for the power transistor based on a supply signal and an input signal from a control unit. In addition, the driver circuit includes a ripple detector configured to receive the supply signal and determine whether the supply signal includes a ripple error. In some examples, the ripple detector may be configured to send a warning signal to the control unit in response to detecting the ripple error.

    RESULT REGISTER WITH READOUT COUNTER VALUE

    公开(公告)号:US20240370197A1

    公开(公告)日:2024-11-07

    申请号:US18311052

    申请日:2023-05-02

    Abstract: A circuit includes one or more datastores configured to store a result register and a readout counter value and logic circuitry coupled to the one or more datastores. The logic circuitry is configured to cause, for a cycle of a plurality of cycles of a periodic signal, one or more analog-to-digital converters (ADCs) to store data to the result register and modify the readout counter value in response to the one or more ADCs storing the data to the result register for the cycle. In response to a read request for the data at the result register for the cycle, the logic circuitry is configured to output the data stored by the result register, output the readout counter value for the cycle, and, after the output of the readout counter value, set the readout counter value to a predetermined value.

    INTER-DRIVER CONTROL SIGNAL
    8.
    发明公开

    公开(公告)号:US20230327665A1

    公开(公告)日:2023-10-12

    申请号:US18296261

    申请日:2023-04-05

    CPC classification number: H03K17/687 H03K19/00361 H03K17/063

    Abstract: A system includes a first driver circuit configured to drive a first switch, a second driver circuit configured to drive a second switch, and a controller arranged to control the first driver circuit and second driver circuit. The controller has an output terminal configured to output a control signal to a first level or a second level, the output terminal being connected to a control terminal of the first driver circuit and to an output terminal of the second driver circuit. The second driver circuit is arranged to drive the output terminal to the first level to indicate an error related to the second driver circuit. The first driver circuit is arranged to drive the first switch to operate in a safe state based on a determination that the control signal on the control terminal is at the first level.

    MONITORING SAFE OPERATING AREA (SAO) OF A POWER SWITCH

    公开(公告)号:US20220285927A1

    公开(公告)日:2022-09-08

    申请号:US17189607

    申请日:2021-03-02

    Abstract: This disclosure is directed to circuits and techniques for protecting a power switch when the power switch is turned ON. A driver circuit may detect whether the power switch is in a desaturation mode or an overcurrent state based on a signal at a detection pin, and disable the power switch in response to detecting that the power switch is in the desaturation mode or the overcurrent state. In addition, the driver circuit may detect whether the power switch is trending towards a safe operating area (SOA) limit of the power switch based on a rate of change of the signal, and disable the power switch in response to detecting that the power switch is trending towards the SOA limit.

    Diagnosis of gate voltage to detect high current

    公开(公告)号:US11901883B2

    公开(公告)日:2024-02-13

    申请号:US17456857

    申请日:2021-11-29

    CPC classification number: H03K17/08122 H03K17/18 H03K2217/0027

    Abstract: Overload detection and protection for power switch circuits. For circuits with faster switching speed, fast fault detection and response to a detected overload condition may be desirable. Detection circuitry may monitor a voltage on the control terminal of one or more power switches. Based on empirical measurements, in an overload condition of a power switch circuit, e.g., a half-bridge circuit, the voltage at the control terminal may increase, and in some examples, increase to a magnitude that is greater than a supply voltage. A comparator may detect a voltage increase that exceeds a voltage magnitude threshold, output an indication to control circuitry for the power switch circuit, and the control circuitry may take action to protect the rest of the circuitry, such as reduce voltage or shut off the power switch circuit.

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