ELECTROSTATIC DISCHARGE PROTECTION

    公开(公告)号:US20250141219A1

    公开(公告)日:2025-05-01

    申请号:US18931784

    申请日:2024-10-30

    Abstract: In accordance with an embodiment, a device includes: a first supply rail; a second supply rail; an input/output terminal; an electrostatic discharge protection device comprising at least two stacked transistors coupled between the input/output terminal and a first one of the first supply rail or the second supply rail; and a trigger circuit coupled to the first supply rail and the second supply rail and configured to: detect an electrostatic discharge event at the input/output terminal based on a voltage of the first supply rail or a voltage of the second supply rail, and switch on the electrostatic discharge protection device in response to detecting the electrostatic discharge event.

    SCR structure for ESD protection in SOI technologies

    公开(公告)号:US11967639B2

    公开(公告)日:2024-04-23

    申请号:US17648985

    申请日:2022-01-26

    Abstract: In accordance with an embodiment, a semiconductor device includes: an n-doped region disposed over an insulating layer; a p-doped region disposed over the insulating layer adjacent to the n-doped region, where an interface between the n-doped region and the p-doped region form a first diode junction; a plurality of segmented p-type anode regions disposed over the insulating layer, each of the plurality of segmented p-type anode regions being surrounded by the n-doped region, where a doping concentration of the plurality of segmented p-type anode regions is greater than a doping concentration of the p-doped region; and a plurality of segmented n-type cathode regions disposed over the insulating layer. Each of the plurality of segmented n-type cathode regions are surrounded by the p-doped region, where a doping concentration of the plurality of segmented n-type cathode regions is greater than a doping concentration of the n-doped region.

    SCR STRUCTURE FOR ESD PROTECTION IN SOI TECHNOLOGIES

    公开(公告)号:US20230238454A1

    公开(公告)日:2023-07-27

    申请号:US17648985

    申请日:2022-01-26

    Abstract: In accordance with an embodiment, a semiconductor device includes: an n-doped region disposed over an insulating layer; a p-doped region disposed over the insulating layer adjacent to the n-doped region, where an interface between the n-doped region and the p-doped region form a first diode junction; a plurality of segmented p-type anode regions disposed over the insulating layer, each of the plurality of segmented p-type anode regions being surrounded by the n-doped region, where a doping concentration of the plurality of segmented p-type anode regions is greater than a doping concentration of the p-doped region; and a plurality of segmented n-type cathode regions disposed over the insulating layer. Each of the plurality of segmented n-type cathode regions are surrounded by the p-doped region, where a doping concentration of the plurality of segmented n-type cathode regions is greater than a doping concentration of the n-doped region.

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