公开(公告)号：US20220230941A1

公开(公告)日：2022-07-21

申请号：US17712375

申请日：2022-04-04

Applicant: Infineon Technologies Austria AG

Inventor： Markus Dinkel ,  Petteri Palm ,  Eung San Cho ,  Josef Hoeglauer ,  Ralf Otremba ,  Fabian Schnoy

IPC: H01L23/492 ,  H01L23/538 ,  H01L23/00 ,  H01L25/16

Abstract: A method includes: arranging a semiconductor device on a redistribution substrate, the device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, the redistribution substrate having an insulating board having a first major surface and a second major surface having solderable contact pads, so that the first power electrode is arranged on a first conductive pad and the control electrode is arranged on a second conductive pad on the first major surface; arranging a contact clip such that a web portion is arranged on the second power electrode and a peripheral rim portion is arranged on a third conductive pad on the first major surface; and electrically coupling the first power electrode, control electrode and peripheral rim portion to the respective conductive pads and electrically coupling the web portion to the second power electrode.

公开(公告)号：US20190371711A1

公开(公告)日：2019-12-05

申请号：US15994306

申请日：2018-05-31

Applicant: Infineon Technologies Austria AG

Inventor： Eung San Cho ,  Chuan Cheah ,  Jobelito Anjao Guanzon

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device package includes a die pad having a die attach surface, a first lead that is spaced apart and extends away from a first side of the die pad, and a semiconductor die mounted on the die attach surface. The semiconductor die includes a first bond pad disposed on an upper side of the semiconductor die that is opposite the die attach surface. A first clip electrically connects the first lead to the first bond pad. The first bond pad is elongated with first and second longer edge sides that are opposite one another and extend along a length of the first bond pad. The semiconductor die is oriented such that the first and second longer edge sides of the first bond pad are non-parallel to a first current flow direction of the first clip that extends between the first bond pad and the first lead.

公开(公告)号：US20190124773A1

公开(公告)日：2019-04-25

申请号：US16224578

申请日：2018-12-18

Applicant: Infineon Technologies Austria AG

Inventor： Eung San Cho ,  Danny Clavette ,  Darryl Galipeau

IPC: H05K3/00 ,  H05K1/11 ,  H05K3/32 ,  H05K3/40 ,  H05K3/46 ,  H05K1/18 ,  H05K1/14 ,  H01L23/00 ,  H01L23/538

Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.

公开(公告)号：US11776882B2

公开(公告)日：2023-10-03

申请号：US17712375

申请日：2022-04-04

Applicant: Infineon Technologies Austria AG

Inventor： Markus Dinkel ,  Petteri Palm ,  Eung San Cho ,  Josef Hoeglauer ,  Ralf Otremba ,  Fabian Schnoy

IPC: H01L23/00 ,  H01L23/492 ,  H01L23/538 ,  H01L25/16

CPC classification number: H01L23/492 ,  H01L23/5383 ,  H01L23/5384 ,  H01L24/08 ,  H01L24/89 ,  H01L25/16 ,  H01L2224/08225 ,  H01L2224/80801

Abstract: A method includes: arranging a semiconductor device on a redistribution substrate, the device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, the redistribution substrate having an insulating board having a first major surface and a second major surface having solderable contact pads, so that the first power electrode is arranged on a first conductive pad and the control electrode is arranged on a second conductive pad on the first major surface; arranging a contact clip such that a web portion is arranged on the second power electrode and a peripheral rim portion is arranged on a third conductive pad on the first major surface; and electrically coupling the first power electrode, control electrode and peripheral rim portion to the respective conductive pads and electrically coupling the web portion to the second power electrode.

公开(公告)号：US20240107674A1

公开(公告)日：2024-03-28

申请号：US17952895

申请日：2022-09-26

Applicant: Infineon Technologies Austria AG

Inventor： Eung San Cho ,  Danny Clavette

IPC: H05K1/18 ,  H02M3/00 ,  H05K1/11 ,  H05K1/14 ,  H05K3/00 ,  H05K3/30 ,  H05K3/36

CPC classification number: H05K1/18 ,  H02M3/003 ,  H05K1/117 ,  H05K1/141 ,  H05K1/145 ,  H05K3/0052 ,  H05K3/30 ,  H05K3/366 ,  H02M3/1584 ,  H05K2201/047 ,  H05K2201/09145 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/1053

Abstract: This disclosure includes multiple assemblies, sub-assemblies, etc., as well as one or more methods of fabricating same. For example, a first assembly includes a first circuit board. The first circuit board further includes first connector elements disposed on a first edge of the first circuit board and second connector elements disposed on a second edge of the first circuit board. The first edge may be disposed substantially opposite the second edge on the first circuit board. The apparatus may further include first circuitry affixed to the first circuit board. The first edge of the first circuit board aligns with a first axial end of the first circuitry and the second edge of the first circuit board aligns with a second axial end of the first circuitry. The first assembly is used to fabricate a second assembly.

公开(公告)号：US10206286B2

公开(公告)日：2019-02-12

申请号：US15633154

申请日：2017-06-26

Applicant: Infineon Technologies Austria AG

Inventor： Eung San Cho ,  Danny Clavette ,  Darryl Galipeau

IPC: H01L23/34 ,  H05K3/00 ,  H05K3/40 ,  H05K3/32

Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.

公开(公告)号：US10681819B2

公开(公告)日：2020-06-09

申请号：US16224578

申请日：2018-12-18

Applicant: Infineon Technologies Austria AG

Inventor： Eung San Cho ,  Danny Clavette ,  Darryl Galipeau

IPC: H01L23/48 ,  H05K3/00 ,  H01L23/538 ,  H01L23/00 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H05K3/46 ,  H05K3/32 ,  H05K3/40

Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.

公开(公告)号：US11302610B2

公开(公告)日：2022-04-12

申请号：US16668038

申请日：2019-10-30

Applicant: Infineon Technologies Austria AG

Inventor： Markus Dinkel ,  Petteri Palm ,  Eung San Cho ,  Josef Hoeglauer ,  Ralf Otremba ,  Fabian Schnoy

IPC: H01L23/00 ,  H01L23/492 ,  H01L23/538 ,  H01L25/16

Abstract: In an embodiment, a semiconductor package includes a package footprint having a plurality of solderable contact pads, a semiconductor device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, a redistribution substrate having an insulating board, wherein the first power electrode and the control electrode are mounted on a first major surface of the insulating board and the solderable contact pads of the package footprint are arranged on a second major surface of the insulating board, and a contact clip having a web portion and one or more peripheral rim portions. The web portion is mounted on and electrically coupled to the second power electrode and the peripheral rim portion is mounted on the first major surface of the insulating board.

公开(公告)号：US10692801B2

公开(公告)日：2020-06-23

申请号：US15994306

申请日：2018-05-31

Applicant: Infineon Technologies Austria AG

Inventor： Eung San Cho ,  Chuan Cheah ,  Jobelito Anjao Guanzon

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: A semiconductor device package includes a die pad having a die attach surface, a first lead that is spaced apart and extends away from a first side of the die pad, and a semiconductor die mounted on the die attach surface. The semiconductor die includes a first bond pad disposed on an upper side of the semiconductor die that is opposite the die attach surface. A first clip electrically connects the first lead to the first bond pad. The first bond pad is elongated with first and second longer edge sides that are opposite one another and extend along a length of the first bond pad. The semiconductor die is oriented such that the first and second longer edge sides of the first bond pad are non-parallel to a first current flow direction of the first clip that extends between the first bond pad and the first lead.

公开(公告)号：US20180376598A1

公开(公告)日：2018-12-27

申请号：US15633154

申请日：2017-06-26

Applicant: Infineon Technologies Austria AG

Inventor： Eung San Cho ,  Danny Clavette ,  Darryl Galipeau

IPC: H05K3/00 ,  H05K3/40 ,  H05K3/32

Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.