公开(公告)号：US10551897B2

公开(公告)日：2020-02-04

申请号：US15719539

申请日：2017-09-28

Applicant: INTEL CORPORATION

Inventor： Myron D. Loewen ,  Andrew W. Morning-Smith ,  Anthony M. Constantine

IPC: G06F21/79 ,  G06F1/3231 ,  G06F1/3287 ,  G06F1/24 ,  G06F3/06 ,  G06F13/42

Abstract: Provided are devices, systems and methods relating to controller interactions with storage. One embodiment includes an apparatus comprising a controller for communication with a storage device through a signal line, wherein the controller is configured to detect a first signal on the signal line indicating the presence of the storage device on the signal line, and provide a second signal on the signal line to reset the storage device after a detection that the first signal indicates the presence of the storage device. Other embodiments are described and claimed.

公开(公告)号：US20220069497A1

公开(公告)日：2022-03-03

申请号：US17524565

申请日：2021-11-11

Applicant: Intel Corporation

Inventor： Xiang Li ,  Anthony M. Constantine ,  Jingbo Li

IPC: H01R12/72 ,  H01R12/53

Abstract: An apparatus includes a rigid housing, a first connector coupled to the housing, the first connector to receive an edge connector of an input/output (I/O) device, and a second connector coupled to the housing, the second connector to couple to an edge connector socket. Pairs of electrical connection pins of the first connector are coupled to respective pairs of electrical connection pins of the second connector via shielded differential cables inside the housing.

公开(公告)号：US10304814B2

公开(公告)日：2019-05-28

申请号：US15640148

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Konika Ganguly ,  Robert J. Royer, Jr. ,  Rebecca Z. Loop ,  Anthony M. Constantine ,  Bilal Khalaf

IPC: G11C14/00 ,  H01L23/50 ,  H01L25/18 ,  H01L23/498

Abstract: An apparatus is described. The apparatus includes a package on package structure. The package on package structure includes an upper package and a lower package. One of the packages contain memory devices of a first type and the other of the packages contain memory devices of a second type. I/O connections on the underside of the upper package's substrate are vertically aligned with their corresponding, first I/O connections on the underside of the lower package's substrate. The first I/O connections are located outside second I/O connections on the underside of the lower package's substrate for the lower package.

公开(公告)号：US10509759B2

公开(公告)日：2019-12-17

申请号：US15476882

申请日：2017-03-31

Applicant: INTEL CORPORATION

Inventor： Daniel S. Willis ,  Anthony M. Constantine

IPC: G06F13/42 ,  G06F9/54 ,  G06F13/38

Abstract: Provided are an apparatus, system, and method relating to detecting, during a system boot operation, whether a device arranged to implement a first bus interface protocol is coupled to a system through a connector. A bus clock is programmed to be off in response to detection of no device implementing the first bus interface protocol being coupled to the system through the connector. After the bus clock is programmed to be off, a buffer is reprogrammed to assume that the connector implements a second bus interface protocol coupled to a storage device. After reprogramming the buffer, the apparatus, system, and method detect whether a device arranged to implement the second bus interface protocol is coupled to the connector, and the device arranged to implement the second bus interface protocol is initialized in response to detection that the device is coupled to the connector. Other embodiments are described and claimed.

公开(公告)号：US10409737B2

公开(公告)日：2019-09-10

申请号：US15700031

申请日：2017-09-08

Applicant: INTEL CORPORATION

Inventor： Myron D. Loewen ,  Andrew W. Morning-Smith ,  Anthony M. Constantine

IPC: H04L12/40 ,  G06F13/16 ,  G06F13/40 ,  G06F13/20

Abstract: Provided are apparatus, system, and method for positionally aware device management bus address assignment. A presence of a plurality of storage devices is detected on a bus. One of the storage devices detected on the bus is selected. A get identifier command is sent on the bus to all of the storage devices that is only responded to by the selected storage device. A unique identifier is received from the selected storage device over the bus. An address for the selected storage device is assigned and an entry is added to the address mapping to indicate the unique identifier, the assigned address, and a physical location indicator for the selected storage device.