DYNAMIC ROUTING OF TEXTURE LOADS IN GRAPHICS PROCESSING

    公开(公告)号:US20230101654A1

    公开(公告)日:2023-03-30

    申请号:US17484955

    申请日:2021-09-24

    Abstract: Dynamic routing of texture-load in graphics processing is described. An example of a processor includes one or more processing resources, the one or more processing resources to load a message including a texture load; a texture sampler and a data port; and a message router to route the texture load to a destination, wherein the destination may be either the texture sampler or the data port; wherein the message router includes arbitration circuitry to select the destination for the texture load, the arbitration circuitry to base selection of the destination at least in part on support by the data port for a format of a memory surface for the texture load; and a utilization metric for the data port representing availability of the data port.

    Dynamic routing of texture loads in graphics processing

    公开(公告)号:US12288284B2

    公开(公告)日:2025-04-29

    申请号:US17484955

    申请日:2021-09-24

    Abstract: Dynamic routing of texture-load in graphics processing is described. An example of a processor includes one or more processing resources, the one or more processing resources to load a message including a texture load; a texture sampler and a data port; and a message router to route the texture load to a destination, wherein the destination may be either the texture sampler or the data port; wherein the message router includes arbitration circuitry to select the destination for the texture load, the arbitration circuitry to base selection of the destination at least in part on support by the data port for a format of a memory surface for the texture load; and a utilization metric for the data port representing availability of the data port.

    Resource load balancing based on usage and power limits

    公开(公告)号:US10983581B2

    公开(公告)日:2021-04-20

    申请号:US15859598

    申请日:2017-12-31

    Abstract: Methods and apparatus relating to techniques for resource load balancing based on usage and/or power limits are described. In an embodiment, resource load balancing logic causes a first resource of a processor to operate at a first frequency and a second resource of the processor to operate at a second frequency. Memory stores a plurality of frequency values. The resource load balancing logic also selects the first frequency and the second frequency based on the stored plurality of frequency values. Operation of the first resource at the first frequency and the second resource at the second frequency in turn causes the processor to operate under a power budget. The resource load balancing logic causes change to the first frequency and the second frequency in response to a determination that operation of the processor is different than the power budget. Other embodiments are also disclosed and claimed.

    OUT-OF-ORDER EXECUTION OF GRAPHICS PROCESSING UNIT TEXTURE SAMPLER OPERATIONS

    公开(公告)号:US20230111571A1

    公开(公告)日:2023-04-13

    申请号:US17484619

    申请日:2021-09-24

    Abstract: Embodiments described herein are generally directed facilitating out-of-order execution of GPU texture sampler operations. An embodiment of a method includes a texture sampler of a GPU maintaining (i) a latency queue operable to store information regarding a set of transactions associated with each of multiple texture sampler operations and (ii) multiple virtual channel (VC) queues each operable to store information regarding transactions for a respective single texture sampler operation at a time. Out-of-order processing of the texture sampler operations is facilitated by making use of the latency queue and the VC queues. For example, during a transaction processing interval, the availability of data in a cache for the transactions associated with each of the VC queues may be determined. A VC queue may be selected based on the determined availability of data. A transaction associated with a head of the selected VC queue may then be processed.

    RESOURCE LOAD BALANCING BASED ON USAGE AND POWER LIMITS

    公开(公告)号:US20190204894A1

    公开(公告)日:2019-07-04

    申请号:US15859598

    申请日:2017-12-31

    CPC classification number: G06F1/324

    Abstract: Methods and apparatus relating to techniques for resource load balancing based on usage and/or power limits are described. In an embodiment, resource load balancing logic causes a first resource of a processor to operate at a first frequency and a second resource of the processor to operate at a second frequency. Memory stores a plurality of frequency values. The resource load balancing logic also selects the first frequency and the second frequency based on the stored plurality of frequency values. Operation of the first resource at the first frequency and the second resource at the second frequency in turn causes the processor to operate under a power budget. The resource load balancing logic causes change to the first frequency and the second frequency in response to a determination that operation of the processor is different than the power budget. Other embodiments are also disclosed and claimed.

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