公开(公告)号：US20220182215A1

公开(公告)日：2022-06-09

申请号：US17677467

申请日：2022-02-22

申请人： Intel Corporation

发明人： Ehud Shoor ,  Tsion Vidal ,  Uri Hermoni ,  Efraim Kugman ,  Sarel Wechsler ,  Oren Salomon ,  Golan Cohen

IPC分类号： H04L7/027 ,  H04L7/00

摘要： In one embodiment, an apparatus comprises: a receiver to receive training data from a transmitter; a clock and data recovery (CDR) circuit coupled to the receiver, the CDR circuit to recover a recovered clock signal from the training data; and a media access control (MAC) circuit coupled to the CDR circuit, wherein the MAC circuit is to send a clock switch indicator to the CDR circuit to cause the CDR circuit to halt tracking operation of the CDR circuit. Other embodiments are described and claimed.

公开(公告)号：US20150121115A1

公开(公告)日：2015-04-30

申请号：US14585596

申请日：2014-12-30

申请人： Intel Corporation

发明人： Prashant R. Chandra ,  Vladimir Yudovich ,  Eran Galil ,  Efraim Kugman

IPC分类号： G06F1/12 ,  G06F13/42

CPC分类号： G06F1/12 ,  G06F13/4022 ,  G06F13/423 ,  H04J3/0667 ,  H04J3/0697 ,  H04L7/00

摘要： Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.

公开(公告)号：US09430435B2

公开(公告)日：2016-08-30

申请号：US14282885

申请日：2014-05-20

申请人： INTEL CORPORATION

发明人： Prashant R. Chandra ,  Kevin C. Kahn ,  Eran Galil ,  Efraim Kugman ,  Naama Zolotov ,  Vladimir Yudovich ,  Yoni Dishon ,  Elli Bagelman

IPC分类号： G06F13/00 ,  G06F13/40

CPC分类号： G06F13/4022 ,  G06F13/4081

摘要： Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.

摘要翻译： 描述了跨计算机设备的多协议I / O互连的多协议隧道传输的方法，装置和系统的实施例。 用于多协议隧道的方法可以包括响应于连接到计算机设备的外围设备在计算机设备的多协议互连的交换结构的端口之间建立第一通信路径，在第二通信路径之间建立第二通信路径 交换结构和特定于协议的控制器，并且通过多协议互连，通过第一和第二通信路径将外围设备的协议的分组从外围设备路由到特定于协议的控制器。 可以描述和要求保护其他实施例。

公开(公告)号：US09164535B2

公开(公告)日：2015-10-20

申请号：US14585596

申请日：2014-12-30

申请人： Intel Corporation

发明人： Prashant R. Chandra ,  Vladimir Yudovich ,  Eran Galil ,  Efraim Kugman

IPC分类号： G06F1/12 ,  G06F13/42 ,  H04J3/06 ,  H04L7/00 ,  G06F13/40

CPC分类号： G06F1/12 ,  G06F13/4022 ,  G06F13/423 ,  H04J3/0667 ,  H04J3/0697 ,  H04L7/00

摘要： Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.

摘要翻译： 描述了用于计算机设备的多协议I / O互连的时间同步的方法，装置和系统的实施例。 用于在多协议I / O互连之间同步时间的方法可以包括将多协议互连的交换结构的第一交换机的第一本地时间提供给交换结构的第二交换机，以及调整第二本地时间 的第二个切换到第一个本地时间。 可以描述和要求保护其他实施例。

公开(公告)号：US20150113186A1

公开(公告)日：2015-04-23

申请号：US14585609

申请日：2014-12-30

申请人： Intel Corporation

发明人： Prashant R. Chandra ,  Vladimir Yudovich ,  Eran Galil ,  Efraim Kugman

IPC分类号： G06F13/42 ,  G06F13/40

CPC分类号： G06F1/12 ,  G06F13/4022 ,  G06F13/423 ,  H04J3/0667 ,  H04J3/0697 ,  H04L7/00

摘要： Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.

摘要翻译： 描述了用于计算机设备的多协议I / O互连的时间同步的方法，装置和系统的实施例。 用于在多协议I / O互连之间同步时间的方法可以包括将多协议互连的交换结构的第一交换机的第一本地时间提供给交换结构的第二交换机，以及调整第二本地时间 的第二个切换到第一个本地时间。 可以描述和要求保护其他实施例。

公开(公告)号：US20220345289A1

公开(公告)日：2022-10-27

申请号：US17858692

申请日：2022-07-06

申请人： Intel Corporation

发明人： Ehud Shoor ,  Tsion Vidal ,  Vladislav Kopzon ,  Uri Hermoni ,  Golan Cohen ,  Efraim Kugman ,  Ziv Kabiry

IPC分类号： H04L7/033

摘要： The circuits and methods described herein provide technical solutions for technical problems facing USB links. To reduce or eliminate effects associated with a USB link entering a low-power mode, initial link acquisition may be performed while the spread-spectrum-clocking (SSC) modulation is disabled. Following the initial link acquisition, the SSC modulation may be enabled dynamically in a later stage. This delayed enablement of the re-timers provides improved performance over solutions in which the SSC modulation is constantly enabled, including reducing the complexity of the timing training process and enabling a faster USB link re-establishment. This reduced link acquisition period may enable the system to enter power saving modes more frequently, and may reduce latency involved in exiting power saving modes. This may maintain or improve total USB transmission speeds and may reduce USB-related power consumption for USB connected devices.

公开(公告)号：US09141132B2

公开(公告)日：2015-09-22

申请号：US14585609

申请日：2014-12-30

申请人： Intel Corporation

发明人： Prashant R. Chandra ,  Vladimir Yudovich ,  Eran Galil ,  Efraim Kugman

IPC分类号： G06F13/42 ,  G06F13/40 ,  G06F1/12 ,  H04J3/06 ,  H04L7/00

CPC分类号： G06F1/12 ,  G06F13/4022 ,  G06F13/423 ,  H04J3/0667 ,  H04J3/0697 ,  H04L7/00

摘要： Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.