公开(公告)号：US20210212205A1

公开(公告)日：2021-07-08

申请号：US17212016

申请日：2021-03-25

Applicant: Intel Corporation

Inventor： Khai Ern See ,  Jia Lin Liew ,  Tin Poay Chuah ,  Chee How Lim ,  Yi How Ooi

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/42 ,  H05K3/00

Abstract: Techniques for power tunnels on circuit boards are disclosed. A power tunnel may be created in a circuit board by drilling through non-conductive layers to a conductive trace and then filling in the hole with a conductor. A power tunnel can have a high cross-sectional area and can carry a larger amount of current than an equivalent-width trace, reducing the area on a circuit board required to carry that amount of current.

公开(公告)号：US12156331B2

公开(公告)日：2024-11-26

申请号：US17212016

申请日：2021-03-25

Applicant: Intel Corporation

Inventor： Khai Ern See ,  Jia Lin Liew ,  Tin Poay Chuah ,  Chee How Lim ,  Yi How Ooi

IPC: H05K1/02 ,  H01L21/3105 ,  H05K1/11 ,  H05K3/00 ,  H05K3/42

Abstract: Techniques for power tunnels on circuit boards are disclosed. A power tunnel may be created in a circuit board by drilling through non-conductive layers to a conductive trace and then filling in the hole with a conductor. A power tunnel can have a high cross-sectional area and can carry a larger amount of current than an equivalent-width trace, reducing the area on a circuit board required to carry that amount of current.