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公开(公告)号:US09973356B1
公开(公告)日:2018-05-15
申请号:US15475690
申请日:2017-03-31
Applicant: Intel Corporation
Inventor: Ram Livne , Ro'ee Eitan , Yoel Krupnik , Vladislav Tsirkin , Tomer Fael , Dror Lazar , Ariel Cohen , Alexander Pogrebinsky , Adee Ofir Ran
CPC classification number: H04L25/03057
Abstract: One embodiment provides an enhanced slicer. The enhanced slicer includes a first clocked comparator circuitry and a current path circuitry. The first clocked comparator circuitry includes a first comparator circuitry, a first latch circuitry, a first output node (Out_P) and a second output node (Out_N). The current path circuitry is coupled to the output nodes and a reference node. The current path circuitry is to enhance current flow between at least one of the output nodes and the reference node, in response to a clock signal.
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公开(公告)号:US09857814B2
公开(公告)日:2018-01-02
申请号:US14129273
申请日:2013-09-27
Applicant: Intel Corporation
Inventor: Ariel Cohen , Yoav Romach , Omer Cohen , Ro'ee Eitan
CPC classification number: G05F1/56 , G01K7/00 , G01K7/01 , G01K2215/00 , G05F1/468 , G05F1/567 , G06F1/26 , H02M3/07
Abstract: Apparatus of a supply generator using dynamic circuit reference is provided which includes: a charge pump to receive a first power supply and to generate a second power supply; a voltage regulator to operate using the second power supply, the voltage regulator having an input to receive a reference and to generate a third power supply; and a reference generator to operate using the first power supply, the reference generator to provide the reference according to an output of a voltage sensing block.
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